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Re: add h8sx support to h8300
- From: Alexandre Oliva <aoliva at redhat dot com>
- To: Richard Henderson <rth at redhat dot com>
- Cc: gcc-patches at gcc dot gnu dot org, rsandifo at redhat dot com
- Date: 07 Jul 2004 03:55:43 -0300
- Subject: Re: add h8sx support to h8300
- Organization: Red Hat Global Engineering Services Compiler Team
- References: <orr7s99lyj.fsf@livre.redhat.lsd.ic.unicamp.br><20040707013159.GA31661@redhat.com>
On Jul 6, 2004, Richard Henderson <rth@redhat.com> wrote:
> (1) Rename the existing rtl movstr patterns to movmem.
Can do. Patch is attached. Will test i686-pc-linux-gnu native
overnight. Ok to install if it passes?
> (2) Create new movstr patterns that mirror how cmpstr patterns operate.
> (3) Expand strcpy/strpcpy like we do strcmp elsewhere in builtins.c.
At first I'd got the impression h8sx didn't have an actual stpcpy
instruction but, as it turns out, Richard Sandiford actually
introduced a pattern that uses movsd and a conditional branch for
that.
On second thought, I realized I'm not sure how to best approach
introducing movstr. I suppose on most machines that can use these
patterns, we'd have some register modified in such a way that at least
movstr is pretty close to the requirements of stpcpy(), and
implementing strcpy() in terms of that would be quite trivial (just
refrain from using the modified register, and use the original one).
However, even if it's close to stpcpy(), some arches will have the
final register point one-past the NUL terminator, whereas others might
have it point to the NUL terminator itself. I suppose we should
probably model movstr exactly after stpcpy(), even if that takes an
additional increment/decrement instruction to get the right value.
This will make the pattern useful for stpcpy and strcpy, and the
additional instruction will likely be optimized away if unneeded, or
combined with other insns, unless it has the needed effect anyway.
So, should movstr be modeled exactly after stpcpy()? With a single
output operand for end-of-dest, or another for end-of-src? I don't
see that end-of-src could be used with the code we have today, but it
might if we could somehow tell GCC that the register that scanned src
got modified similarly to the one that scanned dest. Does it sound
like it might be useful to add an output operand for end-of-src to the
standard pattern?
E.g.:
(define_expand "movstrsi"
;; intuitive notion of the implementation:
[(set (match_operand:BLK 0 "" "") ;; dest
(match_operand:BLK 1 "" "")) ;; src
;; wouldn't it be so nice if :P was a valid mode? :-)
(clobber (match_operand:P 2 "" "")) ;; end-of-dest
(clobber (match_operand:P 3 "" "")) ;; end-of-src
] ...)
Should we perhaps make operands 3, and maybe even 2, optional?
Index: gcc/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* builtins.c: Rename movstr*, except for movstrict*, to
movmem* and clrstr* to clrmem*.
* expr.c: Likewise.
* expr.h: Likewise.
* genopinit.c: Likewise.
* integrate.c: Likewise.
* local-alloc.c: Likewise.
* optabs.c: Likewise.
* optabs.h: Likewise.
* config/alpha/alpha.h: Likewise.
* config/alpha/alpha.md: Likewise.
* config/arm/arm-protos.h: Likewise.
* config/arm/arm.c: Likewise.
* config/arm/arm.md: Likewise.
* config/avr/avr.md: Likewise.
* config/c4x/c4x.c: Likewise.
* config/c4x/c4x.md: Likewise.
* config/frv/frv.md: Likewise.
* config/i386/i386-protos.h: Likewise.
* config/i386/i386.c: Likewise.
* config/i386/i386.h: Likewise.
* config/i386/i386.md: Likewise.
* config/i860/i860.c: Likewise.
* config/i860/i860.md: Likewise.
* config/ip2k/ip2k.md: Likewise.
* config/ip2k/libgcc.S: Likewise.
* config/ip2k/t-ip2k: Likewise.
* config/m32r/m32r.c: Likewise.
* config/m32r/m32r.md: Likewise.
* config/mcore/mcore.md: Likewise.
* config/mips/mips.c: Likewise.
* config/mips/mips.md: Likewise.
* config/ns32k/ns32k.c: Likewise.
* config/ns32k/ns32k.h: Likewise.
* config/ns32k/ns32k.md: Likewise.
* config/pa/pa.c: Likewise.
* config/pa/pa.md: Likewise.
* config/pdp11/pdp11.h: Likewise.
* config/pdp11/pdp11.md: Likewise.
* config/rs6000/rs6000.c: Likewise.
* config/rs6000/rs6000.md: Likewise.
* config/s390/s390-protos.h: Likewise.
* config/s390/s390.c: Likewise.
* config/s390/s390.md: Likewise.
* config/sh/lib1funcs.asm: Likewise.
* config/sh/sh.c: Likewise.
* config/sh/sh.md: Likewise.
* config/sh/t-sh: Likewise.
* config/sparc/sparc.h: Likewise.
* config/vax/vax.md: Likewise.
* config/xtensa/xtensa.c: Likewise.
* config/xtensa/xtensa.md: Likewise.
* doc/invoke.texi: Likewise.
* doc/md.texi: Likewise.
* doc/rtl.texi: Likewise.
Index: gcc/po/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* po/gcc.pot: Rename movstr*, except for movstrict*, to
movmem* and clrstr* to clrmem*.
* po/be.po: Likewise.
* po/ca.po: Likewise.
* po/da.po: Likewise.
* po/de.po: Likewise.
* po/el.po: Likewise.
* po/es.po: Likewise.
* po/fr.po: Likewise.
* po/ja.po: Likewise.
* po/nl.po: Likewise.
* po/sv.po: Likewise.
* po/tr.po: Likewise.
Index: gcc/testsuite/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* gcc.c-torture/execute/builtins/mempcpy-2.c: Rename movstr*,
except for movstrict*, to movmem* and clrstr* to clrmem*.
Index: gcc/builtins.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/builtins.c,v
retrieving revision 1.346
diff -u -p -r1.346 builtins.c
--- gcc/builtins.c 1 Jul 2004 12:52:33 -0000 1.346
+++ gcc/builtins.c 7 Jul 2004 06:16:03 -0000
@@ -970,7 +970,7 @@ expand_builtin_prefetch (tree arglist)
}
/* Get a MEM rtx for expression EXP which is the address of an operand
- to be used to be used in a string instruction (cmpstrsi, movstrsi, ..). */
+ to be used to be used in a string instruction (cmpstrsi, movmemsi, ..). */
static rtx
get_memory_rtx (tree exp)
Index: gcc/expr.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/expr.c,v
retrieving revision 1.670
diff -u -p -r1.670 expr.c
--- gcc/expr.c 6 Jul 2004 20:01:08 -0000 1.670
+++ gcc/expr.c 7 Jul 2004 06:16:10 -0000
@@ -125,7 +125,7 @@ static unsigned HOST_WIDE_INT move_by_pi
static void move_by_pieces_1 (rtx (*) (rtx, ...), enum machine_mode,
struct move_by_pieces *);
static bool block_move_libcall_safe_for_call_parm (void);
-static bool emit_block_move_via_movstr (rtx, rtx, rtx, unsigned);
+static bool emit_block_move_via_movmem (rtx, rtx, rtx, unsigned);
static rtx emit_block_move_via_libcall (rtx, rtx, rtx);
static tree emit_block_move_libcall_fn (int);
static void emit_block_move_via_loop (rtx, rtx, rtx, unsigned);
@@ -134,7 +134,7 @@ static void clear_by_pieces (rtx, unsign
static void store_by_pieces_1 (struct store_by_pieces *, unsigned int);
static void store_by_pieces_2 (rtx (*) (rtx, ...), enum machine_mode,
struct store_by_pieces *);
-static bool clear_storage_via_clrstr (rtx, rtx, unsigned);
+static bool clear_storage_via_clrmem (rtx, rtx, unsigned);
static rtx clear_storage_via_libcall (rtx, rtx);
static tree clear_storage_libcall_fn (int);
static rtx compress_float_constant (rtx, rtx);
@@ -194,10 +194,10 @@ static bool float_extend_from_mem[NUM_MA
#endif
/* This array records the insn_code of insns to perform block moves. */
-enum insn_code movstr_optab[NUM_MACHINE_MODES];
+enum insn_code movmem_optab[NUM_MACHINE_MODES];
/* This array records the insn_code of insns to perform block clears. */
-enum insn_code clrstr_optab[NUM_MACHINE_MODES];
+enum insn_code clrmem_optab[NUM_MACHINE_MODES];
/* These arrays record the insn_code of two different kinds of insns
to perform block compares. */
@@ -1372,7 +1372,7 @@ emit_block_move (rtx x, rtx y, rtx size,
if (GET_CODE (size) == CONST_INT && MOVE_BY_PIECES_P (INTVAL (size), align))
move_by_pieces (x, y, INTVAL (size), align, 0);
- else if (emit_block_move_via_movstr (x, y, size, align))
+ else if (emit_block_move_via_movmem (x, y, size, align))
;
else if (may_use_call)
retval = emit_block_move_via_libcall (x, y, size);
@@ -1434,11 +1434,11 @@ block_move_libcall_safe_for_call_parm (v
return true;
}
-/* A subroutine of emit_block_move. Expand a movstr pattern;
+/* A subroutine of emit_block_move. Expand a movmem pattern;
return true if successful. */
static bool
-emit_block_move_via_movstr (rtx x, rtx y, rtx size, unsigned int align)
+emit_block_move_via_movmem (rtx x, rtx y, rtx size, unsigned int align)
{
rtx opalign = GEN_INT (align / BITS_PER_UNIT);
int save_volatile_ok = volatile_ok;
@@ -1454,7 +1454,7 @@ emit_block_move_via_movstr (rtx x, rtx y
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
- enum insn_code code = movstr_optab[(int) mode];
+ enum insn_code code = movmem_optab[(int) mode];
insn_operand_predicate_fn pred;
if (code != CODE_FOR_nothing
@@ -2543,7 +2543,7 @@ clear_storage (rtx object, rtx size)
else if (GET_CODE (size) == CONST_INT
&& CLEAR_BY_PIECES_P (INTVAL (size), align))
clear_by_pieces (object, INTVAL (size), align);
- else if (clear_storage_via_clrstr (object, size, align))
+ else if (clear_storage_via_clrmem (object, size, align))
;
else
retval = clear_storage_via_libcall (object, size);
@@ -2552,11 +2552,11 @@ clear_storage (rtx object, rtx size)
return retval;
}
-/* A subroutine of clear_storage. Expand a clrstr pattern;
+/* A subroutine of clear_storage. Expand a clrmem pattern;
return true if successful. */
static bool
-clear_storage_via_clrstr (rtx object, rtx size, unsigned int align)
+clear_storage_via_clrmem (rtx object, rtx size, unsigned int align)
{
/* Try the most limited insn first, because there's no point
including more than one in the machine description unless
@@ -2568,7 +2568,7 @@ clear_storage_via_clrstr (rtx object, rt
for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT); mode != VOIDmode;
mode = GET_MODE_WIDER_MODE (mode))
{
- enum insn_code code = clrstr_optab[(int) mode];
+ enum insn_code code = clrmem_optab[(int) mode];
insn_operand_predicate_fn pred;
if (code != CODE_FOR_nothing
Index: gcc/expr.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/expr.h,v
retrieving revision 1.159
diff -u -p -r1.159 expr.h
--- gcc/expr.h 24 Jun 2004 13:47:49 -0000 1.159
+++ gcc/expr.h 7 Jul 2004 06:16:10 -0000
@@ -82,10 +82,10 @@ enum expand_modifier {EXPAND_NORMAL = 0,
#define OK_DEFER_POP (inhibit_defer_pop -= 1)
/* If a memory-to-memory move would take MOVE_RATIO or more simple
- move-instruction sequences, we will do a movstr or libcall instead. */
+ move-instruction sequences, we will do a movmem or libcall instead. */
#ifndef MOVE_RATIO
-#if defined (HAVE_movstrqi) || defined (HAVE_movstrhi) || defined (HAVE_movstrsi) || defined (HAVE_movstrdi) || defined (HAVE_movstrti)
+#if defined (HAVE_movmemqi) || defined (HAVE_movmemhi) || defined (HAVE_movmemsi) || defined (HAVE_movmemdi) || defined (HAVE_movmemti)
#define MOVE_RATIO 2
#else
/* If we are optimizing for space (-Os), cut down the default move ratio. */
@@ -94,10 +94,10 @@ enum expand_modifier {EXPAND_NORMAL = 0,
#endif
/* If a clear memory operation would take CLEAR_RATIO or more simple
- move-instruction sequences, we will do a clrstr or libcall instead. */
+ move-instruction sequences, we will do a clrmem or libcall instead. */
#ifndef CLEAR_RATIO
-#if defined (HAVE_clrstrqi) || defined (HAVE_clrstrhi) || defined (HAVE_clrstrsi) || defined (HAVE_clrstrdi) || defined (HAVE_clrstrti)
+#if defined (HAVE_clrmemqi) || defined (HAVE_clrmemhi) || defined (HAVE_clrmemsi) || defined (HAVE_clrmemdi) || defined (HAVE_clrmemti)
#define CLEAR_RATIO 2
#else
/* If we are optimizing for space, cut down the default clear ratio. */
Index: gcc/genopinit.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/genopinit.c,v
retrieving revision 1.75
diff -u -p -r1.75 genopinit.c
--- gcc/genopinit.c 7 May 2004 05:38:14 -0000 1.75
+++ gcc/genopinit.c 7 Jul 2004 06:16:11 -0000
@@ -162,8 +162,8 @@ static const char * const optabs[] =
"push_optab->handlers[$A].insn_code = CODE_FOR_$(push$a1$)",
"reload_in_optab[$A] = CODE_FOR_$(reload_in$a$)",
"reload_out_optab[$A] = CODE_FOR_$(reload_out$a$)",
- "movstr_optab[$A] = CODE_FOR_$(movstr$a$)",
- "clrstr_optab[$A] = CODE_FOR_$(clrstr$a$)",
+ "movmem_optab[$A] = CODE_FOR_$(movmem$a$)",
+ "clrmem_optab[$A] = CODE_FOR_$(clrmem$a$)",
"cmpstr_optab[$A] = CODE_FOR_$(cmpstr$a$)",
"cmpmem_optab[$A] = CODE_FOR_$(cmpmem$a$)",
"vec_set_optab->handlers[$A].insn_code = CODE_FOR_$(vec_set$a$)",
Index: gcc/integrate.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/integrate.c,v
retrieving revision 1.263
diff -u -p -r1.263 integrate.c
--- gcc/integrate.c 6 Jul 2004 02:20:09 -0000 1.263
+++ gcc/integrate.c 7 Jul 2004 06:16:11 -0000
@@ -367,7 +367,7 @@ copy_rtx_and_substitute (rtx orig, struc
case CLOBBER:
/* USE and CLOBBER are ordinary, but we convert (use (subreg foo))
to (use foo) if the original insn didn't have a subreg.
- Removing the subreg distorts the VAX movstrhi pattern
+ Removing the subreg distorts the VAX movmemhi pattern
by changing the mode of an operand. */
copy = copy_rtx_and_substitute (XEXP (orig, 0), map, code == CLOBBER);
if (GET_CODE (copy) == SUBREG && GET_CODE (XEXP (orig, 0)) != SUBREG)
Index: gcc/local-alloc.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/local-alloc.c,v
retrieving revision 1.132
diff -u -p -r1.132 local-alloc.c
--- gcc/local-alloc.c 1 Jul 2004 12:52:46 -0000 1.132
+++ gcc/local-alloc.c 7 Jul 2004 06:16:13 -0000
@@ -1724,7 +1724,7 @@ qty_sugg_compare_1 (const void *q1p, con
We don't actually combine a hard reg with a pseudo; instead
we just record the hard reg as the suggestion for the pseudo's quantity.
If we really combined them, we could lose if the pseudo lives
- across an insn that clobbers the hard reg (eg, movstr).
+ across an insn that clobbers the hard reg (eg, movmem).
ALREADY_DEAD is nonzero if USEDREG is known to be dead even though
there is no REG_DEAD note on INSN. This occurs during the processing
Index: gcc/optabs.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/optabs.c,v
retrieving revision 1.226
diff -u -p -r1.226 optabs.c
--- gcc/optabs.c 5 Jul 2004 19:49:11 -0000 1.226
+++ gcc/optabs.c 7 Jul 2004 06:16:16 -0000
@@ -5422,8 +5422,8 @@ init_optabs (void)
for (i = 0; i < NUM_MACHINE_MODES; i++)
{
- movstr_optab[i] = CODE_FOR_nothing;
- clrstr_optab[i] = CODE_FOR_nothing;
+ movmem_optab[i] = CODE_FOR_nothing;
+ clrmem_optab[i] = CODE_FOR_nothing;
cmpstr_optab[i] = CODE_FOR_nothing;
cmpmem_optab[i] = CODE_FOR_nothing;
Index: gcc/optabs.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/optabs.h,v
retrieving revision 1.29
diff -u -p -r1.29 optabs.h
--- gcc/optabs.h 7 May 2004 05:38:14 -0000 1.29
+++ gcc/optabs.h 7 Jul 2004 06:16:16 -0000
@@ -391,10 +391,10 @@ extern enum insn_code movcc_gen_code[NUM
#endif
/* This array records the insn_code of insns to perform block moves. */
-extern enum insn_code movstr_optab[NUM_MACHINE_MODES];
+extern enum insn_code movmem_optab[NUM_MACHINE_MODES];
/* This array records the insn_code of insns to perform block clears. */
-extern enum insn_code clrstr_optab[NUM_MACHINE_MODES];
+extern enum insn_code clrmem_optab[NUM_MACHINE_MODES];
/* These arrays record the insn_code of two different kinds of insns
to perform block compares. */
Index: gcc/config/alpha/alpha.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.h,v
retrieving revision 1.221
diff -u -p -r1.221 alpha.h
--- gcc/config/alpha/alpha.h 5 Jul 2004 19:49:11 -0000 1.221
+++ gcc/config/alpha/alpha.h 7 Jul 2004 06:16:19 -0000
@@ -1347,7 +1347,7 @@ do { \
#define MOVE_MAX 8
/* If a memory-to-memory move would take MOVE_RATIO or more simple
- move-instruction pairs, we will do a movstr or libcall instead.
+ move-instruction pairs, we will do a movmem or libcall instead.
Without byte/word accesses, we want no more than four instructions;
with, several single byte accesses are better. */
Index: gcc/config/alpha/alpha.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/alpha/alpha.md,v
retrieving revision 1.222
diff -u -p -r1.222 alpha.md
--- gcc/config/alpha/alpha.md 1 May 2004 12:26:28 -0000 1.222
+++ gcc/config/alpha/alpha.md 7 Jul 2004 06:16:22 -0000
@@ -6431,7 +6431,7 @@
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrqi"
+(define_expand "movmemqi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "immediate_operand" ""))
@@ -6444,7 +6444,7 @@
FAIL;
})
-(define_expand "movstrdi"
+(define_expand "movmemdi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "immediate_operand" ""))
@@ -6464,7 +6464,7 @@
alpha_need_linkage (XSTR (operands[4], 0), 0);
})
-(define_insn "*movstrdi_1"
+(define_insn "*movmemdi_1"
[(set (match_operand:BLK 0 "memory_operand" "=m,=m")
(match_operand:BLK 1 "memory_operand" "m,m"))
(use (match_operand:DI 2 "nonmemory_operand" "r,i"))
@@ -6494,7 +6494,7 @@
[(set_attr "type" "multi")
(set_attr "length" "28")])
-(define_expand "clrstrqi"
+(define_expand "clrmemqi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:DI 1 "immediate_operand" ""))
@@ -6507,7 +6507,7 @@
FAIL;
})
-(define_expand "clrstrdi"
+(define_expand "clrmemdi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:DI 1 "immediate_operand" ""))
@@ -6524,7 +6524,7 @@
alpha_need_linkage (XSTR (operands[3], 0), 0);
})
-(define_insn "*clrstrdi_1"
+(define_insn "*clrmemdi_1"
[(set (match_operand:BLK 0 "memory_operand" "=m,=m")
(const_int 0))
(use (match_operand:DI 1 "nonmemory_operand" "r,i"))
Index: gcc/config/arm/arm-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm-protos.h,v
retrieving revision 1.68
diff -u -p -r1.68 arm-protos.h
--- gcc/config/arm/arm-protos.h 5 May 2004 23:11:52 -0000 1.68
+++ gcc/config/arm/arm-protos.h 7 Jul 2004 06:16:22 -0000
@@ -118,7 +118,7 @@ extern int store_multiple_sequence (rtx
extern const char * emit_stm_seq (rtx *, int);
extern rtx arm_gen_load_multiple (int, int, rtx, int, int, int, int, int);
extern rtx arm_gen_store_multiple (int, int, rtx, int, int, int, int, int);
-extern int arm_gen_movstrqi (rtx *);
+extern int arm_gen_movmemqi (rtx *);
extern rtx arm_gen_rotated_half_load (rtx);
extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx,
@@ -189,7 +189,7 @@ extern int thumb_shiftable_const (unsign
extern void thumb_final_prescan_insn (rtx);
extern const char *thumb_load_double_from_address (rtx *);
extern const char *thumb_output_move_mem_multiple (int, rtx *);
-extern void thumb_expand_movstrqi (rtx *);
+extern void thumb_expand_movmemqi (rtx *);
extern int thumb_cmp_operand (rtx, enum machine_mode);
extern int thumb_cbrch_target_operand (rtx, enum machine_mode);
extern rtx *thumb_legitimize_pic_address (rtx, enum machine_mode, rtx);
Index: gcc/config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.371
diff -u -p -r1.371 arm.c
--- gcc/config/arm/arm.c 6 Jul 2004 21:21:23 -0000 1.371
+++ gcc/config/arm/arm.c 7 Jul 2004 06:16:30 -0000
@@ -5924,7 +5924,7 @@ arm_gen_store_multiple (int base_regno,
}
int
-arm_gen_movstrqi (rtx *operands)
+arm_gen_movmemqi (rtx *operands)
{
HOST_WIDE_INT in_words_to_go, out_words_to_go, last_bytes;
int i;
@@ -13811,7 +13811,7 @@ thumb_output_move_mem_multiple (int n, r
/* Routines for generating rtl. */
void
-thumb_expand_movstrqi (rtx *operands)
+thumb_expand_movmemqi (rtx *operands)
{
rtx out = copy_to_mode_reg (SImode, XEXP (operands[0], 0));
rtx in = copy_to_mode_reg (SImode, XEXP (operands[1], 0));
Index: gcc/config/arm/arm.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.172
diff -u -p -r1.172 arm.md
--- gcc/config/arm/arm.md 30 Jun 2004 09:17:43 -0000 1.172
+++ gcc/config/arm/arm.md 7 Jul 2004 06:16:34 -0000
@@ -5493,7 +5493,7 @@
;; We could let this apply for blocks of less than this, but it clobbers so
;; many registers that there is then probably a better way.
-(define_expand "movstrqi"
+(define_expand "movmemqi"
[(match_operand:BLK 0 "general_operand" "")
(match_operand:BLK 1 "general_operand" "")
(match_operand:SI 2 "const_int_operand" "")
@@ -5502,7 +5502,7 @@
"
if (TARGET_ARM)
{
- if (arm_gen_movstrqi (operands))
+ if (arm_gen_movmemqi (operands))
DONE;
FAIL;
}
@@ -5512,7 +5512,7 @@
|| INTVAL (operands[2]) > 48)
FAIL;
- thumb_expand_movstrqi (operands);
+ thumb_expand_movmemqi (operands);
DONE;
}
"
Index: gcc/config/avr/avr.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/avr/avr.md,v
retrieving revision 1.45
diff -u -p -r1.45 avr.md
--- gcc/config/avr/avr.md 19 Mar 2004 20:07:54 -0000 1.45
+++ gcc/config/avr/avr.md 7 Jul 2004 06:16:35 -0000
@@ -345,7 +345,7 @@
;;=========================================================================
;; move string (like memcpy)
-(define_expand "movstrhi"
+(define_expand "movmemhi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:HI 2 "const_int_operand" ""))
@@ -376,7 +376,7 @@
operands[1] = gen_rtx_MEM (BLKmode, addr1);
}")
-(define_insn "*movstrqi_insn"
+(define_insn "*movmemqi_insn"
[(set (mem:BLK (match_operand:HI 0 "register_operand" "e"))
(mem:BLK (match_operand:HI 1 "register_operand" "e")))
(use (match_operand:QI 2 "register_operand" "r"))
@@ -392,7 +392,7 @@
[(set_attr "length" "4")
(set_attr "cc" "clobber")])
-(define_insn "*movstrhi"
+(define_insn "*movmemhi"
[(set (mem:BLK (match_operand:HI 0 "register_operand" "e,e"))
(mem:BLK (match_operand:HI 1 "register_operand" "e,e")))
(use (match_operand:HI 2 "register_operand" "!w,d"))
@@ -420,7 +420,7 @@
;; =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0 =0
;; memset (%0, 0, %1)
-(define_expand "clrstrhi"
+(define_expand "clrmemhi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:HI 1 "const_int_operand" ""))
@@ -448,7 +448,7 @@
operands[0] = gen_rtx_MEM (BLKmode, addr0);
}")
-(define_insn "*clrstrqi"
+(define_insn "*clrmemqi"
[(set (mem:BLK (match_operand:HI 0 "register_operand" "e"))
(const_int 0))
(use (match_operand:QI 1 "register_operand" "r"))
@@ -462,7 +462,7 @@
[(set_attr "length" "3")
(set_attr "cc" "clobber")])
-(define_insn "*clrstrhi"
+(define_insn "*clrmemhi"
[(set (mem:BLK (match_operand:HI 0 "register_operand" "e,e"))
(const_int 0))
(use (match_operand:HI 1 "register_operand" "!w,d"))
Index: gcc/config/c4x/c4x.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.c,v
retrieving revision 1.150
diff -u -p -r1.150 c4x.c
--- gcc/config/c4x/c4x.c 4 Jul 2004 08:07:05 -0000 1.150
+++ gcc/config/c4x/c4x.c 7 Jul 2004 06:16:37 -0000
@@ -2348,7 +2348,7 @@ c4x_rptb_insert (rtx insn)
rtx count_reg;
/* If the count register has not been allocated to RC, say if
- there is a movstr pattern in the loop, then do not insert a
+ there is a movmem pattern in the loop, then do not insert a
RPTB instruction. Instead we emit a decrement and branch
at the end of the loop. */
count_reg = XEXP (XEXP (SET_SRC (XVECEXP (PATTERN (insn), 0, 0)), 0), 0);
Index: gcc/config/c4x/c4x.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/c4x/c4x.md,v
retrieving revision 1.89
diff -u -p -r1.89 c4x.md
--- gcc/config/c4x/c4x.md 30 Jun 2004 09:32:41 -0000 1.89
+++ gcc/config/c4x/c4x.md 7 Jul 2004 06:16:40 -0000
@@ -5574,7 +5574,7 @@
"0"
"")
-(define_expand "movstrqi_small"
+(define_expand "movmemqi_small"
[(parallel [(set (mem:BLK (match_operand:BLK 0 "src_operand" ""))
(mem:BLK (match_operand:BLK 1 "src_operand" "")))
(use (match_operand:QI 2 "immediate_operand" ""))
@@ -5634,7 +5634,7 @@
; operand 3 is the shared alignment
; operand 4 is a scratch register
-(define_insn "movstrqi_large"
+(define_insn "movmemqi_large"
[(set (mem:BLK (match_operand:QI 0 "addr_reg_operand" "a"))
(mem:BLK (match_operand:QI 1 "addr_reg_operand" "a")))
(use (match_operand:QI 2 "immediate_operand" "i"))
@@ -5681,7 +5681,7 @@
[(set_attr "type" "multi")])
; Operand 2 is the count, operand 3 is the alignment.
-(define_expand "movstrqi"
+(define_expand "movmemqi"
[(parallel [(set (mem:BLK (match_operand:BLK 0 "src_operand" ""))
(mem:BLK (match_operand:BLK 1 "src_operand" "")))
(use (match_operand:QI 2 "immediate_operand" ""))
@@ -5702,11 +5702,11 @@
tmp = gen_reg_rtx (QImode);
/* Disabled because of reload problems. */
if (0 && INTVAL (operands[2]) < 8)
- emit_insn (gen_movstrqi_small (operands[0], operands[1], operands[2],
+ emit_insn (gen_movmemqi_small (operands[0], operands[1], operands[2],
operands[3], tmp));
else
{
- emit_insn (gen_movstrqi_large (operands[0], operands[1], operands[2],
+ emit_insn (gen_movmemqi_large (operands[0], operands[1], operands[2],
operands[3], tmp));
}
DONE;
Index: gcc/config/frv/frv.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/frv/frv.md,v
retrieving revision 1.15
diff -u -p -r1.15 frv.md
--- gcc/config/frv/frv.md 3 May 2004 02:16:16 -0000 1.15
+++ gcc/config/frv/frv.md 7 Jul 2004 06:16:43 -0000
@@ -1835,7 +1835,7 @@
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(use (match_operand:SI 2 "" ""))
@@ -1854,7 +1854,7 @@
;; Argument 1 is the length
;; Argument 2 is the alignment
-(define_expand "clrstrsi"
+(define_expand "clrmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(const_int 0))
(use (match_operand:SI 1 "" ""))
Index: gcc/config/i386/i386-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386-protos.h,v
retrieving revision 1.112
diff -u -p -r1.112 i386-protos.h
--- gcc/config/i386/i386-protos.h 6 Jul 2004 22:40:16 -0000 1.112
+++ gcc/config/i386/i386-protos.h 7 Jul 2004 06:16:43 -0000
@@ -95,8 +95,8 @@ extern int long_memory_operand (rtx, enu
extern int aligned_operand (rtx, enum machine_mode);
extern enum machine_mode ix86_cc_mode (enum rtx_code, rtx, rtx);
-extern int ix86_expand_movstr (rtx, rtx, rtx, rtx);
-extern int ix86_expand_clrstr (rtx, rtx, rtx);
+extern int ix86_expand_movmem (rtx, rtx, rtx, rtx);
+extern int ix86_expand_clrmem (rtx, rtx, rtx);
extern int ix86_expand_strlen (rtx, rtx, rtx, rtx);
extern bool legitimate_constant_p (rtx);
Index: gcc/config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.681
diff -u -p -r1.681 i386.c
--- gcc/config/i386/i386.c 6 Jul 2004 22:40:16 -0000 1.681
+++ gcc/config/i386/i386.c 7 Jul 2004 06:16:54 -0000
@@ -11103,9 +11103,9 @@ ix86_zero_extend_to_Pmode (rtx exp)
}
/* Expand string move (memcpy) operation. Use i386 string operations when
- profitable. expand_clrstr contains similar code. */
+ profitable. expand_clrmem contains similar code. */
int
-ix86_expand_movstr (rtx dst, rtx src, rtx count_exp, rtx align_exp)
+ix86_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp)
{
rtx srcreg, destreg, countreg, srcexp, destexp;
enum machine_mode counter_mode;
@@ -11382,9 +11382,9 @@ ix86_expand_movstr (rtx dst, rtx src, rt
}
/* Expand string clear operation (bzero). Use i386 string operations when
- profitable. expand_movstr contains similar code. */
+ profitable. expand_movmem contains similar code. */
int
-ix86_expand_clrstr (rtx dst, rtx count_exp, rtx align_exp)
+ix86_expand_clrmem (rtx dst, rtx count_exp, rtx align_exp)
{
rtx destreg, zeroreg, countreg, destexp;
enum machine_mode counter_mode;
Index: gcc/config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.387
diff -u -p -r1.387 i386.h
--- gcc/config/i386/i386.h 21 Jun 2004 20:41:38 -0000 1.387
+++ gcc/config/i386/i386.h 7 Jul 2004 06:16:57 -0000
@@ -2529,7 +2529,7 @@ enum ix86_builtins
#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4)
/* If a memory-to-memory move would take MOVE_RATIO or more simple
- move-instruction pairs, we will do a movstr or libcall instead.
+ move-instruction pairs, we will do a movmem or libcall instead.
Increasing the value will always make code faster, but eventually
incurs high cost in increased code size.
Index: gcc/config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.546
diff -u -p -r1.546 i386.md
--- gcc/config/i386/i386.md 24 Jun 2004 17:54:13 -0000 1.546
+++ gcc/config/i386/i386.md 7 Jul 2004 06:17:06 -0000
@@ -16410,27 +16410,27 @@
"cld"
[(set_attr "type" "cld")])
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:SI 2 "nonmemory_operand" ""))
(use (match_operand:SI 3 "const_int_operand" ""))]
"! optimize_size"
{
- if (ix86_expand_movstr (operands[0], operands[1], operands[2], operands[3]))
+ if (ix86_expand_movmem (operands[0], operands[1], operands[2], operands[3]))
DONE;
else
FAIL;
})
-(define_expand "movstrdi"
+(define_expand "movmemdi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "nonmemory_operand" ""))
(use (match_operand:DI 3 "const_int_operand" ""))]
"TARGET_64BIT"
{
- if (ix86_expand_movstr (operands[0], operands[1], operands[2], operands[3]))
+ if (ix86_expand_movmem (operands[0], operands[1], operands[2], operands[3]))
DONE;
else
FAIL;
@@ -16698,25 +16698,25 @@
(set_attr "memory" "both")
(set_attr "mode" "SI")])
-(define_expand "clrstrsi"
+(define_expand "clrmemsi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:SI 1 "nonmemory_operand" ""))
(use (match_operand 2 "const_int_operand" ""))]
""
{
- if (ix86_expand_clrstr (operands[0], operands[1], operands[2]))
+ if (ix86_expand_clrmem (operands[0], operands[1], operands[2]))
DONE;
else
FAIL;
})
-(define_expand "clrstrdi"
+(define_expand "clrmemdi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:DI 1 "nonmemory_operand" ""))
(use (match_operand 2 "const_int_operand" ""))]
"TARGET_64BIT"
{
- if (ix86_expand_clrstr (operands[0], operands[1], operands[2]))
+ if (ix86_expand_clrmem (operands[0], operands[1], operands[2]))
DONE;
else
FAIL;
Index: gcc/config/i860/i860.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i860/i860.c,v
retrieving revision 1.44
diff -u -p -r1.44 i860.c
--- gcc/config/i860/i860.c 22 Jun 2004 03:06:47 -0000 1.44
+++ gcc/config/i860/i860.c 7 Jul 2004 06:17:07 -0000
@@ -1014,7 +1014,7 @@ output_block_move (rtx *operands)
#if 0
rtx zoperands[10];
#endif
- static int movstrsi_label = 0;
+ static int movmemsi_label = 0;
int i;
rtx temp1 = operands[4];
rtx alignrtx = operands[3];
@@ -1115,7 +1115,7 @@ output_block_move (rtx *operands)
/* Generate number for unique label. */
- xoperands[3] = GEN_INT (movstrsi_label++);
+ xoperands[3] = GEN_INT (movmemsi_label++);
/* Calculate the size of the chunks we will be trying to move first. */
Index: gcc/config/i860/i860.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i860/i860.md,v
retrieving revision 1.16
diff -u -p -r1.16 i860.md
--- gcc/config/i860/i860.md 23 Aug 2003 02:30:35 -0000 1.16
+++ gcc/config/i860/i860.md 7 Jul 2004 06:17:08 -0000
@@ -1010,7 +1010,7 @@
;; but it should suffice
;; that anything generated as this insn will be recognized as one
;; and that it won't successfully combine with anything.
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "general_operand" "")
(match_operand:BLK 1 "general_operand" ""))
(use (match_operand:SI 2 "nonmemory_operand" ""))
Index: gcc/config/ip2k/ip2k.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/ip2k.md,v
retrieving revision 1.11
diff -u -p -r1.11 ip2k.md
--- gcc/config/ip2k/ip2k.md 4 Feb 2004 20:00:59 -0000 1.11
+++ gcc/config/ip2k/ip2k.md 7 Jul 2004 06:17:10 -0000
@@ -864,7 +864,7 @@
;; Copy a block of bytes (memcpy()). We expand the definition to convert
;; our memory operand into a register pointer operand instead.
;;
-(define_expand "movstrhi"
+(define_expand "movmemhi"
[(use (match_operand:BLK 0 "memory_operand" ""))
(use (match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:HI 2 "general_operand" ""))
@@ -881,7 +881,7 @@
else
count = operands[2];
- emit_insn (gen_movstrhi_expanded (addr0, count, addr1));
+ emit_insn (gen_movmemhi_expanded (addr0, count, addr1));
DONE;
}")
@@ -892,7 +892,7 @@
;; the general case where we have either a variable block size or one that is
;; greater than 255 bytes.
;;
-(define_insn "movstrhi_expanded"
+(define_insn "movmemhi_expanded"
[(set
(mem:BLK
(match_operand:HI 0 "nonimmediate_operand" "rS,ro,rS, rS, ro, rS"))
@@ -902,12 +902,12 @@
(match_operand:HI 1 "general_operand" "P, P, P,rSi,rSi,roi"))]
""
"@
- push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movstrhi_countqi\;call\\t__movstrhi_countqi
- push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movstrhi_countqi\;call\\t__movstrhi_countqi
- push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movstrhi_countqi\;call\\t__movstrhi_countqi
- push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movstrhi_counthi\;call\\t__movstrhi_counthi
- push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movstrhi_counthi\;call\\t__movstrhi_counthi
- push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movstrhi_counthi\;call\\t__movstrhi_counthi")
+ push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movmemhi_countqi\;call\\t__movmemhi_countqi
+ push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movmemhi_countqi\;call\\t__movmemhi_countqi
+ push\\t%L1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>\;page\\t__movmemhi_countqi\;call\\t__movmemhi_countqi
+ push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movmemhi_counthi\;call\\t__movmemhi_counthi
+ push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movmemhi_counthi\;call\\t__movmemhi_counthi
+ push\\t%L1%<\;push\\t%H1%<\;push\\t%L2%<\;push\\t%H2%<\;push\\t%L0%<\;push\\t%H0%>%>%>%>%>\;page\\t__movmemhi_counthi\;call\\t__movmemhi_counthi")
;; Bit insert
Index: gcc/config/ip2k/libgcc.S
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/libgcc.S,v
retrieving revision 1.6
diff -u -p -r1.6 libgcc.S
--- gcc/config/ip2k/libgcc.S 15 Mar 2004 18:20:48 -0000 1.6
+++ gcc/config/ip2k/libgcc.S 7 Jul 2004 06:17:10 -0000
@@ -1374,12 +1374,12 @@ __leaf_fp_pop_args_ret:
.endfunc
#endif /* L_leaf_fp_pop_args_ret */
-#if defined(L_movstrhi_countqi)
+#if defined(L_movmemhi_countqi)
.sect .pram.libgcc,"ax"
- .global __movstrhi_countqi
- .func _movstrhi_countqi, __movstrhi_countqi
+ .global __movmemhi_countqi
+ .func _movmemhi_countqi, __movmemhi_countqi
-__movstrhi_countqi:
+__movmemhi_countqi:
push dph ; Save our pointer regs
push dpl
push iph
@@ -1414,12 +1414,12 @@ __movstrhi_countqi:
.endfunc
#endif
-#if defined(L_movstrhi_counthi)
+#if defined(L_movmemhi_counthi)
.sect .text.libgcc,"ax"
- .global __movstrhi_counthi
- .func _movstrhi_counthi, __movstrhi_counthi
+ .global __movmemhi_counthi
+ .func _movmemhi_counthi, __movmemhi_counthi
-__movstrhi_counthi:
+__movmemhi_counthi:
push dph ; Save our pointer regs
push dpl
push iph
Index: gcc/config/ip2k/t-ip2k
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ip2k/t-ip2k,v
retrieving revision 1.3
diff -u -p -r1.3 t-ip2k
--- gcc/config/ip2k/t-ip2k 10 Oct 2002 19:45:59 -0000 1.3
+++ gcc/config/ip2k/t-ip2k 7 Jul 2004 06:17:10 -0000
@@ -19,8 +19,8 @@ LIB1ASMFUNCS = \
_fp_pop_args_ret \
_pop2_args_ret \
_leaf_fp_pop_args_ret \
- _movstrhi_countqi \
- _movstrhi_counthi \
+ _movmemhi_countqi \
+ _movmemhi_counthi \
abort \
_exit
Index: gcc/config/m32r/m32r.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/m32r.c,v
retrieving revision 1.95
diff -u -p -r1.95 m32r.c
--- gcc/config/m32r/m32r.c 5 Jul 2004 19:49:15 -0000 1.95
+++ gcc/config/m32r/m32r.c 7 Jul 2004 06:17:12 -0000
@@ -2692,7 +2692,7 @@ m32r_expand_block_move (rtx operands[])
to the word after the end of the source block, and dst_reg to point
to the last word of the destination block, provided that the block
is MAX_MOVE_BYTES long. */
- emit_insn (gen_movstrsi_internal (dst_reg, src_reg, at_a_time,
+ emit_insn (gen_movmemsi_internal (dst_reg, src_reg, at_a_time,
new_dst_reg, new_src_reg));
emit_move_insn (dst_reg, new_dst_reg);
emit_move_insn (src_reg, new_src_reg);
@@ -2706,7 +2706,7 @@ m32r_expand_block_move (rtx operands[])
}
if (leftover)
- emit_insn (gen_movstrsi_internal (dst_reg, src_reg, GEN_INT (leftover),
+ emit_insn (gen_movmemsi_internal (dst_reg, src_reg, GEN_INT (leftover),
gen_reg_rtx (SImode),
gen_reg_rtx (SImode)));
}
Index: gcc/config/m32r/m32r.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/m32r/m32r.md,v
retrieving revision 1.45
diff -u -p -r1.45 m32r.md
--- gcc/config/m32r/m32r.md 28 Jun 2004 22:39:21 -0000 1.45
+++ gcc/config/m32r/m32r.md 7 Jul 2004 06:17:13 -0000
@@ -2522,7 +2522,7 @@
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "general_operand" "")
(match_operand:BLK 1 "general_operand" ""))
(use (match_operand:SI 2 "immediate_operand" ""))
@@ -2539,7 +2539,7 @@
;; Insn generated by block moves
-(define_insn "movstrsi_internal"
+(define_insn "movmemsi_internal"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "r")) ;; destination
(mem:BLK (match_operand:SI 1 "register_operand" "r"))) ;; source
(use (match_operand:SI 2 "m32r_block_immediate_operand" "J"));; # bytes to move
Index: gcc/config/mcore/mcore.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mcore/mcore.md,v
retrieving revision 1.17
diff -u -p -r1.17 mcore.md
--- gcc/config/mcore/mcore.md 6 Jul 2004 07:12:32 -0000 1.17
+++ gcc/config/mcore/mcore.md 7 Jul 2004 06:17:14 -0000
@@ -2846,7 +2846,7 @@
;; Block move - adapted from m88k.md
;; ------------------------------------------------------------------------
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (mem:BLK (match_operand:BLK 0 "" ""))
(mem:BLK (match_operand:BLK 1 "" "")))
(use (match_operand:SI 2 "general_operand" ""))
Index: gcc/config/mips/mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.424
diff -u -p -r1.424 mips.c
--- gcc/config/mips/mips.c 5 Jul 2004 06:37:07 -0000 1.424
+++ gcc/config/mips/mips.c 7 Jul 2004 06:17:22 -0000
@@ -3504,7 +3504,7 @@ mips_block_move_loop (rtx dest, rtx src,
mips_block_move_straight (dest, src, leftover);
}
-/* Expand a movstrsi instruction. */
+/* Expand a movmemsi instruction. */
bool
mips_expand_block_move (rtx dest, rtx src, rtx length)
Index: gcc/config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.249
diff -u -p -r1.249 mips.md
--- gcc/config/mips/mips.md 4 Jul 2004 21:09:37 -0000 1.249
+++ gcc/config/mips/mips.md 7 Jul 2004 06:17:24 -0000
@@ -5174,7 +5174,7 @@ dsrl\t%3,%3,1\n\
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "general_operand")
(match_operand:BLK 1 "general_operand"))
(use (match_operand:SI 2 ""))
Index: gcc/config/ns32k/ns32k.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/ns32k.c,v
retrieving revision 1.47
diff -u -p -r1.47 ns32k.c
--- gcc/config/ns32k/ns32k.c 7 Mar 2004 04:45:05 -0000 1.47
+++ gcc/config/ns32k/ns32k.c 7 Jul 2004 06:17:25 -0000
@@ -887,7 +887,7 @@ expand_block_move (rtx operands[])
dest = copy_addr_to_reg (XEXP (operands[0], 0));
src = copy_addr_to_reg (XEXP (operands[1], 0));
- emit_insn (gen_movstrsi2(dest, src, GEN_INT (words)));
+ emit_insn (gen_movmemsi2(dest, src, GEN_INT (words)));
}
}
move_tail (operands, bytes & 3, bytes & ~3);
@@ -914,7 +914,7 @@ expand_block_move (rtx operands[])
if (bytes >> 2)
{
emit_move_insn (count_reg, GEN_INT (bytes >> 2));
- emit_insn (gen_movstrsi1 (GEN_INT (4)));
+ emit_insn (gen_movmemsi1 (GEN_INT (4)));
}
/* insns to copy rest */
move_tail (operands, bytes & 3, 0);
@@ -923,7 +923,7 @@ expand_block_move (rtx operands[])
{
/* insns to copy by words */
emit_insn (gen_lshrsi3 (count_reg, bytes_rtx, const2_rtx));
- emit_insn (gen_movstrsi1 (GEN_INT (4)));
+ emit_insn (gen_movmemsi1 (GEN_INT (4)));
if (constp)
{
move_tail (operands, bytes & 3, 0);
@@ -932,7 +932,7 @@ expand_block_move (rtx operands[])
{
/* insns to copy rest */
emit_insn (gen_andsi3 (count_reg, bytes_rtx, GEN_INT (3)));
- emit_insn (gen_movstrsi1 (const1_rtx));
+ emit_insn (gen_movmemsi1 (const1_rtx));
}
}
else
@@ -958,17 +958,17 @@ expand_block_move (rtx operands[])
emit_insn (gen_negsi2 (count_reg, src_reg));
emit_insn (gen_andsi3 (count_reg, count_reg, GEN_INT (3)));
emit_insn (gen_subsi3 (bytes_reg, bytes_reg, count_reg));
- emit_insn (gen_movstrsi1 (const1_rtx));
+ emit_insn (gen_movmemsi1 (const1_rtx));
if (!constp)
emit_label (aligned_label);
/* insns to copy by words */
emit_insn (gen_lshrsi3 (count_reg, bytes_reg, const2_rtx));
- emit_insn (gen_movstrsi1 (GEN_INT (4)));
+ emit_insn (gen_movmemsi1 (GEN_INT (4)));
/* insns to copy rest */
emit_insn (gen_andsi3 (count_reg, bytes_reg, GEN_INT (3)));
- emit_insn (gen_movstrsi1 (const1_rtx));
+ emit_insn (gen_movmemsi1 (const1_rtx));
}
}
Index: gcc/config/ns32k/ns32k.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/ns32k.h,v
retrieving revision 1.67
diff -u -p -r1.67 ns32k.h
--- gcc/config/ns32k/ns32k.h 11 Mar 2004 05:54:33 -0000 1.67
+++ gcc/config/ns32k/ns32k.h 7 Jul 2004 06:17:26 -0000
@@ -1104,7 +1104,7 @@ __transfer_from_trampoline () \
/* The number of scalar move insns which should be generated instead
of a string move insn or a library call.
- We have a smart movstrsi insn */
+ We have a smart movmemsi insn */
#define MOVE_RATIO 0
#define STORE_RATIO (optimize_size ? 3 : 15)
Index: gcc/config/ns32k/ns32k.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/ns32k/ns32k.md,v
retrieving revision 1.30
diff -u -p -r1.30 ns32k.md
--- gcc/config/ns32k/ns32k.md 15 Mar 2004 18:20:49 -0000 1.30
+++ gcc/config/ns32k/ns32k.md 7 Jul 2004 06:17:27 -0000
@@ -543,10 +543,10 @@
;;
;; Strategy: Use define_expand to
;; either emit insns directly if it can be done simply or
-;; emit rtl to match movstrsi1 which has extra scratch registers
+;; emit rtl to match movmemsi1 which has extra scratch registers
;; which can be used to generate more complex code.
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:SI 2 "general_operand" ""))
@@ -568,7 +568,7 @@
;; r3 match
-(define_insn "movstrsi1"
+(define_insn "movmemsi1"
[(set (mem:BLK (reg:SI 2))
(mem:BLK (reg:SI 1)))
(use (reg:SI 0))
@@ -585,7 +585,7 @@
return \"movsb\";
}")
-(define_insn "movstrsi2"
+(define_insn "movmemsi2"
[(set (mem:BLK (match_operand:SI 0 "address_operand" "p"))
(mem:BLK (match_operand:SI 1 "address_operand" "p")))
(use (match_operand 2 "immediate_operand" "i"))]
Index: gcc/config/pa/pa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.c,v
retrieving revision 1.254
diff -u -p -r1.254 pa.c
--- gcc/config/pa/pa.c 6 Jul 2004 21:21:29 -0000 1.254
+++ gcc/config/pa/pa.c 7 Jul 2004 06:17:32 -0000
@@ -95,8 +95,8 @@ static int pa_can_combine_p (rtx, rtx, r
static int forward_branch_p (rtx);
static int shadd_constant_p (int);
static void compute_zdepwi_operands (unsigned HOST_WIDE_INT, unsigned *);
-static int compute_movstr_length (rtx);
-static int compute_clrstr_length (rtx);
+static int compute_movmem_length (rtx);
+static int compute_clrmem_length (rtx);
static bool pa_assemble_integer (rtx, unsigned int, int);
static void remove_useless_addtr_insns (int);
static void store_reg (int, HOST_WIDE_INT, int);
@@ -2802,7 +2802,7 @@ output_block_move (rtx *operands, int si
count insns rather than emit them. */
static int
-compute_movstr_length (rtx insn)
+compute_movmem_length (rtx insn)
{
rtx pat = PATTERN (insn);
unsigned int align = INTVAL (XEXP (XVECEXP (pat, 0, 7), 0));
@@ -2944,7 +2944,7 @@ output_block_clear (rtx *operands, int s
count insns rather than emit them. */
static int
-compute_clrstr_length (rtx insn)
+compute_clrmem_length (rtx insn)
{
rtx pat = PATTERN (insn);
unsigned int align = INTVAL (XEXP (XVECEXP (pat, 0, 4), 0));
@@ -4805,7 +4805,7 @@ pa_adjust_insn_length (rtx insn, int len
&& GET_CODE (XEXP (XVECEXP (pat, 0, 0), 1)) == MEM
&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 0)) == BLKmode
&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 1)) == BLKmode)
- return compute_movstr_length (insn) - 4;
+ return compute_movmem_length (insn) - 4;
/* Block clear pattern. */
else if (GET_CODE (insn) == INSN
&& GET_CODE (pat) == PARALLEL
@@ -4813,7 +4813,7 @@ pa_adjust_insn_length (rtx insn, int len
&& GET_CODE (XEXP (XVECEXP (pat, 0, 0), 0)) == MEM
&& XEXP (XVECEXP (pat, 0, 0), 1) == const0_rtx
&& GET_MODE (XEXP (XVECEXP (pat, 0, 0), 0)) == BLKmode)
- return compute_clrstr_length (insn) - 4;
+ return compute_clrmem_length (insn) - 4;
/* Conditional branch with an unfilled delay slot. */
else if (GET_CODE (insn) == JUMP_INSN && ! simplejump_p (insn))
{
Index: gcc/config/pa/pa.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.md,v
retrieving revision 1.151
diff -u -p -r1.151 pa.md
--- gcc/config/pa/pa.md 5 Jul 2004 17:49:20 -0000 1.151
+++ gcc/config/pa/pa.md 7 Jul 2004 06:17:35 -0000
@@ -3140,9 +3140,9 @@
;; The definition of this insn does not really explain what it does,
;; but it should suffice that anything generated as this insn will be
-;; recognized as a movstrsi operation, and that it will not successfully
+;; recognized as a movmemsi operation, and that it will not successfully
;; combine with anything.
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(clobber (match_dup 4))
@@ -3222,7 +3222,7 @@
;; operands 0 and 1 are both equivalent to symbolic MEMs. Thus, we are
;; forced to internally copy operands 0 and 1 to operands 7 and 8,
;; respectively. We then split or peephole optimize after reload.
-(define_insn "movstrsi_prereload"
+(define_insn "movmemsi_prereload"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
(mem:BLK (match_operand:SI 1 "register_operand" "r,r")))
(clobber (match_operand:SI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3315,7 +3315,7 @@
}
}")
-(define_insn "movstrsi_postreload"
+(define_insn "movmemsi_postreload"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r"))
(mem:BLK (match_operand:SI 1 "register_operand" "+r,r")))
(clobber (match_operand:SI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3330,7 +3330,7 @@
"* return output_block_move (operands, !which_alternative);"
[(set_attr "type" "multi,multi")])
-(define_expand "movstrdi"
+(define_expand "movmemdi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(clobber (match_dup 4))
@@ -3410,7 +3410,7 @@
;; operands 0 and 1 are both equivalent to symbolic MEMs. Thus, we are
;; forced to internally copy operands 0 and 1 to operands 7 and 8,
;; respectively. We then split or peephole optimize after reload.
-(define_insn "movstrdi_prereload"
+(define_insn "movmemdi_prereload"
[(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r"))
(mem:BLK (match_operand:DI 1 "register_operand" "r,r")))
(clobber (match_operand:DI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3503,7 +3503,7 @@
}
}")
-(define_insn "movstrdi_postreload"
+(define_insn "movmemdi_postreload"
[(set (mem:BLK (match_operand:DI 0 "register_operand" "+r,r"))
(mem:BLK (match_operand:DI 1 "register_operand" "+r,r")))
(clobber (match_operand:DI 2 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3518,7 +3518,7 @@
"* return output_block_move (operands, !which_alternative);"
[(set_attr "type" "multi,multi")])
-(define_expand "clrstrsi"
+(define_expand "clrmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(const_int 0))
(clobber (match_dup 3))
@@ -3554,7 +3554,7 @@
operands[4] = gen_reg_rtx (SImode);
}")
-(define_insn "clrstrsi_prereload"
+(define_insn "clrmemsi_prereload"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
(const_int 0))
(clobber (match_operand:SI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3616,7 +3616,7 @@
}
}")
-(define_insn "clrstrsi_postreload"
+(define_insn "clrmemsi_postreload"
[(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r"))
(const_int 0))
(clobber (match_operand:SI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3628,7 +3628,7 @@
"* return output_block_clear (operands, !which_alternative);"
[(set_attr "type" "multi,multi")])
-(define_expand "clrstrdi"
+(define_expand "clrmemdi"
[(parallel [(set (match_operand:BLK 0 "" "")
(const_int 0))
(clobber (match_dup 3))
@@ -3664,7 +3664,7 @@
operands[4] = gen_reg_rtx (DImode);
}")
-(define_insn "clrstrdi_prereload"
+(define_insn "clrmemdi_prereload"
[(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r"))
(const_int 0))
(clobber (match_operand:DI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp
@@ -3726,7 +3726,7 @@
}
}")
-(define_insn "clrstrdi_postreload"
+(define_insn "clrmemdi_postreload"
[(set (mem:BLK (match_operand:DI 0 "register_operand" "+r,r"))
(const_int 0))
(clobber (match_operand:DI 1 "register_operand" "=&r,&r")) ;loop cnt/tmp
Index: gcc/config/pdp11/pdp11.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pdp11/pdp11.h,v
retrieving revision 1.60
diff -u -p -r1.60 pdp11.h
--- gcc/config/pdp11/pdp11.h 11 Mar 2004 05:54:34 -0000 1.60
+++ gcc/config/pdp11/pdp11.h 7 Jul 2004 06:17:37 -0000
@@ -71,7 +71,7 @@ extern int target_flags;
{ "no-45", -8, "" }, \
/* is 11/10 */ \
{ "10", -12, N_("Generate code for an 11/10") }, \
-/* use movstrhi for bcopy */ \
+/* use movmemhi for bcopy */ \
{ "bcopy", 16, NULL }, \
{ "bcopy-builtin", -16, NULL }, \
/* use 32 bit for int */ \
Index: gcc/config/pdp11/pdp11.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pdp11/pdp11.md,v
retrieving revision 1.21
diff -u -p -r1.21 pdp11.md
--- gcc/config/pdp11/pdp11.md 27 Sep 2003 04:48:27 -0000 1.21
+++ gcc/config/pdp11/pdp11.md 7 Jul 2004 06:17:37 -0000
@@ -688,7 +688,7 @@
;; maybe fiddle a bit with move_ratio, then
;; let constraints only accept a register ...
-(define_expand "movstrhi"
+(define_expand "movmemhi"
[(parallel [(set (match_operand:BLK 0 "general_operand" "=g,g")
(match_operand:BLK 1 "general_operand" "g,g"))
(use (match_operand:HI 2 "arith_operand" "n,&mr"))
@@ -712,7 +712,7 @@
}")
-(define_insn "" ; "movstrhi"
+(define_insn "" ; "movmemhi"
[(set (mem:BLK (match_operand:HI 0 "general_operand" "=r,r"))
(mem:BLK (match_operand:HI 1 "general_operand" "r,r")))
(use (match_operand:HI 2 "arith_operand" "n,&r"))
Index: gcc/config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.660
diff -u -p -r1.660 rs6000.c
--- gcc/config/rs6000/rs6000.c 2 Jul 2004 18:00:46 -0000 1.660
+++ gcc/config/rs6000/rs6000.c 7 Jul 2004 06:17:46 -0000
@@ -8216,7 +8216,7 @@ expand_block_move (rtx operands[])
for (offset = 0; bytes > 0; offset += move_bytes, bytes -= move_bytes)
{
union {
- rtx (*movstrsi) (rtx, rtx, rtx, rtx);
+ rtx (*movmemsi) (rtx, rtx, rtx, rtx);
rtx (*mov) (rtx, rtx);
} gen_func;
enum machine_mode mode = BLKmode;
@@ -8234,7 +8234,7 @@ expand_block_move (rtx operands[])
&& ! fixed_regs[12])
{
move_bytes = (bytes > 32) ? 32 : bytes;
- gen_func.movstrsi = gen_movstrsi_8reg;
+ gen_func.movmemsi = gen_movmemsi_8reg;
}
else if (TARGET_STRING
&& bytes > 16 /* move up to 24 bytes at a time */
@@ -8246,7 +8246,7 @@ expand_block_move (rtx operands[])
&& ! fixed_regs[10])
{
move_bytes = (bytes > 24) ? 24 : bytes;
- gen_func.movstrsi = gen_movstrsi_6reg;
+ gen_func.movmemsi = gen_movmemsi_6reg;
}
else if (TARGET_STRING
&& bytes > 8 /* move up to 16 bytes at a time */
@@ -8256,7 +8256,7 @@ expand_block_move (rtx operands[])
&& ! fixed_regs[8])
{
move_bytes = (bytes > 16) ? 16 : bytes;
- gen_func.movstrsi = gen_movstrsi_4reg;
+ gen_func.movmemsi = gen_movmemsi_4reg;
}
else if (bytes >= 8 && TARGET_POWERPC64
/* 64-bit loads and stores require word-aligned
@@ -8270,7 +8270,7 @@ expand_block_move (rtx operands[])
else if (TARGET_STRING && bytes > 4 && !TARGET_POWERPC64)
{ /* move up to 8 bytes at a time */
move_bytes = (bytes > 8) ? 8 : bytes;
- gen_func.movstrsi = gen_movstrsi_2reg;
+ gen_func.movmemsi = gen_movmemsi_2reg;
}
else if (bytes >= 4 && (align >= 4 || ! STRICT_ALIGNMENT))
{ /* move 4 bytes */
@@ -8287,7 +8287,7 @@ expand_block_move (rtx operands[])
else if (TARGET_STRING && bytes > 1)
{ /* move up to 4 bytes at a time */
move_bytes = (bytes > 4) ? 4 : bytes;
- gen_func.movstrsi = gen_movstrsi_1reg;
+ gen_func.movmemsi = gen_movmemsi_1reg;
}
else /* move 1 byte at a time */
{
@@ -8317,7 +8317,7 @@ expand_block_move (rtx operands[])
if (mode == BLKmode)
{
- /* Move the address into scratch registers. The movstrsi
+ /* Move the address into scratch registers. The movmemsi
patterns require zero offset. */
if (!REG_P (XEXP (src, 0)))
{
@@ -8333,7 +8333,7 @@ expand_block_move (rtx operands[])
}
set_mem_size (dest, GEN_INT (move_bytes));
- emit_insn ((*gen_func.movstrsi) (dest, src,
+ emit_insn ((*gen_func.movmemsi) (dest, src,
GEN_INT (move_bytes & 31),
align_rtx));
}
Index: gcc/config/rs6000/rs6000.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.309
diff -u -p -r1.309 rs6000.md
--- gcc/config/rs6000/rs6000.md 25 Jun 2004 00:59:35 -0000 1.309
+++ gcc/config/rs6000/rs6000.md 7 Jul 2004 06:17:50 -0000
@@ -9116,7 +9116,7 @@
;; Argument 2 is the length
;; Argument 3 is the alignment
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(use (match_operand:SI 2 "" ""))
@@ -9133,7 +9133,7 @@
;; Move up to 32 bytes at a time. The fixed registers are needed because the
;; register allocator doesn't have a clue about allocating 8 word registers.
;; rD/rS = r5 is preferred, efficient form.
-(define_expand "movstrsi_8reg"
+(define_expand "movmemsi_8reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
@@ -9225,7 +9225,7 @@
;; Move up to 24 bytes at a time. The fixed registers are needed because the
;; register allocator doesn't have a clue about allocating 6 word registers.
;; rD/rS = r5 is preferred, efficient form.
-(define_expand "movstrsi_6reg"
+(define_expand "movmemsi_6reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
@@ -9306,7 +9306,7 @@
;; Move up to 16 bytes at a time, using 4 fixed registers to avoid spill
;; problems with TImode.
;; rD/rS = r5 is preferred, efficient form.
-(define_expand "movstrsi_4reg"
+(define_expand "movmemsi_4reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
@@ -9377,7 +9377,7 @@
(set_attr "length" "8")])
;; Move up to 8 bytes at a time.
-(define_expand "movstrsi_2reg"
+(define_expand "movmemsi_2reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
@@ -9414,7 +9414,7 @@
(set_attr "length" "8")])
;; Move up to 4 bytes at a time.
-(define_expand "movstrsi_1reg"
+(define_expand "movmemsi_1reg"
[(parallel [(set (match_operand 0 "" "")
(match_operand 1 "" ""))
(use (match_operand 2 "" ""))
Index: gcc/config/s390/s390-protos.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390-protos.h,v
retrieving revision 1.50
diff -u -p -r1.50 s390-protos.h
--- gcc/config/s390/s390-protos.h 27 Jun 2004 15:31:52 -0000 1.50
+++ gcc/config/s390/s390-protos.h 7 Jul 2004 06:17:51 -0000
@@ -74,8 +74,8 @@ extern int s390_plus_operand (rtx, enum
extern void s390_expand_plus_operand (rtx, rtx, rtx);
extern void emit_symbolic_move (rtx *);
extern void s390_load_address (rtx, rtx);
-extern void s390_expand_movstr (rtx, rtx, rtx);
-extern void s390_expand_clrstr (rtx, rtx);
+extern void s390_expand_movmem (rtx, rtx, rtx);
+extern void s390_expand_clrmem (rtx, rtx);
extern void s390_expand_cmpmem (rtx, rtx, rtx, rtx);
extern bool s390_expand_addcc (enum rtx_code, rtx, rtx, rtx, rtx, rtx);
extern rtx s390_return_addr_rtx (int, rtx);
Index: gcc/config/s390/s390.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.c,v
retrieving revision 1.155
diff -u -p -r1.155 s390.c
--- gcc/config/s390/s390.c 4 Jul 2004 08:07:09 -0000 1.155
+++ gcc/config/s390/s390.c 7 Jul 2004 06:17:54 -0000
@@ -3029,17 +3029,17 @@ legitimize_address (register rtx x, regi
/* Emit code to move LEN bytes from DST to SRC. */
void
-s390_expand_movstr (rtx dst, rtx src, rtx len)
+s390_expand_movmem (rtx dst, rtx src, rtx len)
{
if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
{
if (INTVAL (len) > 0)
- emit_insn (gen_movstr_short (dst, src, GEN_INT (INTVAL (len) - 1)));
+ emit_insn (gen_movmem_short (dst, src, GEN_INT (INTVAL (len) - 1)));
}
else if (TARGET_MVCLE)
{
- emit_insn (gen_movstr_long (dst, src, convert_to_mode (Pmode, len, 1)));
+ emit_insn (gen_movmem_long (dst, src, convert_to_mode (Pmode, len, 1)));
}
else
@@ -3081,7 +3081,7 @@ s390_expand_movstr (rtx dst, rtx src, rt
emit_label (loop_start_label);
- emit_insn (gen_movstr_short (dst, src, GEN_INT (255)));
+ emit_insn (gen_movmem_short (dst, src, GEN_INT (255)));
s390_load_address (dst_addr,
gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
s390_load_address (src_addr,
@@ -3097,7 +3097,7 @@ s390_expand_movstr (rtx dst, rtx src, rt
emit_jump (loop_start_label);
emit_label (loop_end_label);
- emit_insn (gen_movstr_short (dst, src,
+ emit_insn (gen_movmem_short (dst, src,
convert_to_mode (Pmode, count, 1)));
emit_label (end_label);
}
@@ -3106,17 +3106,17 @@ s390_expand_movstr (rtx dst, rtx src, rt
/* Emit code to clear LEN bytes at DST. */
void
-s390_expand_clrstr (rtx dst, rtx len)
+s390_expand_clrmem (rtx dst, rtx len)
{
if (GET_CODE (len) == CONST_INT && INTVAL (len) >= 0 && INTVAL (len) <= 256)
{
if (INTVAL (len) > 0)
- emit_insn (gen_clrstr_short (dst, GEN_INT (INTVAL (len) - 1)));
+ emit_insn (gen_clrmem_short (dst, GEN_INT (INTVAL (len) - 1)));
}
else if (TARGET_MVCLE)
{
- emit_insn (gen_clrstr_long (dst, convert_to_mode (Pmode, len, 1)));
+ emit_insn (gen_clrmem_long (dst, convert_to_mode (Pmode, len, 1)));
}
else
@@ -3156,7 +3156,7 @@ s390_expand_clrstr (rtx dst, rtx len)
emit_label (loop_start_label);
- emit_insn (gen_clrstr_short (dst, GEN_INT (255)));
+ emit_insn (gen_clrmem_short (dst, GEN_INT (255)));
s390_load_address (dst_addr,
gen_rtx_PLUS (Pmode, dst_addr, GEN_INT (256)));
@@ -3170,7 +3170,7 @@ s390_expand_clrstr (rtx dst, rtx len)
emit_jump (loop_start_label);
emit_label (loop_end_label);
- emit_insn (gen_clrstr_short (dst, convert_to_mode (Pmode, count, 1)));
+ emit_insn (gen_clrmem_short (dst, convert_to_mode (Pmode, count, 1)));
emit_label (end_label);
}
}
Index: gcc/config/s390/s390.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.md,v
retrieving revision 1.115
diff -u -p -r1.115 s390.md
--- gcc/config/s390/s390.md 4 Jul 2004 08:07:10 -0000 1.115
+++ gcc/config/s390/s390.md 7 Jul 2004 06:17:56 -0000
@@ -1873,29 +1873,29 @@
(set_attr "length" "8")])
;
-; movstrM instruction pattern(s).
+; movmemM instruction pattern(s).
;
-(define_expand "movstrdi"
+(define_expand "movmemdi"
[(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:DI 2 "general_operand" ""))
(match_operand 3 "" "")]
"TARGET_64BIT"
- "s390_expand_movstr (operands[0], operands[1], operands[2]); DONE;")
+ "s390_expand_movmem (operands[0], operands[1], operands[2]); DONE;")
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
(use (match_operand:SI 2 "general_operand" ""))
(match_operand 3 "" "")]
""
- "s390_expand_movstr (operands[0], operands[1], operands[2]); DONE;")
+ "s390_expand_movmem (operands[0], operands[1], operands[2]); DONE;")
; Move a block that is up to 256 bytes in length.
; The block length is taken as (operands[2] % 256) + 1.
-(define_expand "movstr_short"
+(define_expand "movmem_short"
[(parallel
[(set (match_operand:BLK 0 "memory_operand" "")
(match_operand:BLK 1 "memory_operand" ""))
@@ -1904,7 +1904,7 @@
""
"operands[3] = gen_rtx_SCRATCH (Pmode);")
-(define_insn "*movstr_short"
+(define_insn "*movmem_short"
[(set (match_operand:BLK 0 "memory_operand" "=Q,Q")
(match_operand:BLK 1 "memory_operand" "Q,Q"))
(use (match_operand 2 "nonmemory_operand" "n,a"))
@@ -1933,7 +1933,7 @@
; Move a block of arbitrary length.
-(define_expand "movstr_long"
+(define_expand "movmem_long"
[(parallel
[(clobber (match_dup 2))
(clobber (match_dup 3))
@@ -1966,7 +1966,7 @@
operands[3] = reg1;
})
-(define_insn "*movstr_long_64"
+(define_insn "*movmem_long_64"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(clobber (match_operand:TI 1 "register_operand" "=d"))
(set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
@@ -1980,7 +1980,7 @@
(set_attr "type" "vs")
(set_attr "length" "8")])
-(define_insn "*movstr_long_31"
+(define_insn "*movmem_long_31"
[(clobber (match_operand:DI 0 "register_operand" "=d"))
(clobber (match_operand:DI 1 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
@@ -1995,29 +1995,29 @@
(set_attr "length" "8")])
;
-; clrstrM instruction pattern(s).
+; clrmemM instruction pattern(s).
;
-(define_expand "clrstrdi"
+(define_expand "clrmemdi"
[(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:DI 1 "general_operand" ""))
(match_operand 2 "" "")]
"TARGET_64BIT"
- "s390_expand_clrstr (operands[0], operands[1]); DONE;")
+ "s390_expand_clrmem (operands[0], operands[1]); DONE;")
-(define_expand "clrstrsi"
+(define_expand "clrmemsi"
[(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
(use (match_operand:SI 1 "general_operand" ""))
(match_operand 2 "" "")]
""
- "s390_expand_clrstr (operands[0], operands[1]); DONE;")
+ "s390_expand_clrmem (operands[0], operands[1]); DONE;")
; Clear a block that is up to 256 bytes in length.
; The block length is taken as (operands[1] % 256) + 1.
-(define_expand "clrstr_short"
+(define_expand "clrmem_short"
[(parallel
[(set (match_operand:BLK 0 "memory_operand" "")
(const_int 0))
@@ -2027,7 +2027,7 @@
""
"operands[2] = gen_rtx_SCRATCH (Pmode);")
-(define_insn "*clrstr_short"
+(define_insn "*clrmem_short"
[(set (match_operand:BLK 0 "memory_operand" "=Q,Q")
(const_int 0))
(use (match_operand 1 "nonmemory_operand" "n,a"))
@@ -2057,7 +2057,7 @@
; Clear a block of arbitrary length.
-(define_expand "clrstr_long"
+(define_expand "clrmem_long"
[(parallel
[(clobber (match_dup 1))
(set (match_operand:BLK 0 "memory_operand" "")
@@ -2084,7 +2084,7 @@
operands[2] = reg1;
})
-(define_insn "*clrstr_long_64"
+(define_insn "*clrmem_long_64"
[(clobber (match_operand:TI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:DI (match_operand:TI 2 "register_operand" "0") 0))
(const_int 0))
@@ -2097,7 +2097,7 @@
(set_attr "type" "vs")
(set_attr "length" "8")])
-(define_insn "*clrstr_long_31"
+(define_insn "*clrmem_long_31"
[(clobber (match_operand:DI 0 "register_operand" "=d"))
(set (mem:BLK (subreg:SI (match_operand:DI 2 "register_operand" "0") 0))
(const_int 0))
Index: gcc/config/sh/lib1funcs.asm
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/lib1funcs.asm,v
retrieving revision 1.36
diff -u -p -r1.36 lib1funcs.asm
--- gcc/config/sh/lib1funcs.asm 12 Aug 2003 01:25:07 -0000 1.36
+++ gcc/config/sh/lib1funcs.asm 7 Jul 2004 06:17:57 -0000
@@ -710,128 +710,128 @@ LOCAL(lshrsi3_0):
ENDFUNC(GLOBAL(lshrsi3))
#endif
-#ifdef L_movstr
+#ifdef L_movmem
.text
! done all the large groups, do the remainder
-! jump to movstr+
+! jump to movmem+
done:
add #64,r5
- mova GLOBAL(movstrSI0),r0
+ mova GLOBAL(movmemSI0),r0
shll2 r6
add r6,r0
jmp @r0
add #64,r4
.align 4
- .global GLOBAL(movstrSI64)
- FUNC(GLOBAL(movstrSI64))
-GLOBAL(movstrSI64):
+ .global GLOBAL(movmemSI64)
+ FUNC(GLOBAL(movmemSI64))
+GLOBAL(movmemSI64):
mov.l @(60,r5),r0
mov.l r0,@(60,r4)
- .global GLOBAL(movstrSI60)
- FUNC(GLOBAL(movstrSI60))
-GLOBAL(movstrSI60):
+ .global GLOBAL(movmemSI60)
+ FUNC(GLOBAL(movmemSI60))
+GLOBAL(movmemSI60):
mov.l @(56,r5),r0
mov.l r0,@(56,r4)
- .global GLOBAL(movstrSI56)
- FUNC(GLOBAL(movstrSI56))
-GLOBAL(movstrSI56):
+ .global GLOBAL(movmemSI56)
+ FUNC(GLOBAL(movmemSI56))
+GLOBAL(movmemSI56):
mov.l @(52,r5),r0
mov.l r0,@(52,r4)
- .global GLOBAL(movstrSI52)
- FUNC(GLOBAL(movstrSI52))
-GLOBAL(movstrSI52):
+ .global GLOBAL(movmemSI52)
+ FUNC(GLOBAL(movmemSI52))
+GLOBAL(movmemSI52):
mov.l @(48,r5),r0
mov.l r0,@(48,r4)
- .global GLOBAL(movstrSI48)
- FUNC(GLOBAL(movstrSI48))
-GLOBAL(movstrSI48):
+ .global GLOBAL(movmemSI48)
+ FUNC(GLOBAL(movmemSI48))
+GLOBAL(movmemSI48):
mov.l @(44,r5),r0
mov.l r0,@(44,r4)
- .global GLOBAL(movstrSI44)
- FUNC(GLOBAL(movstrSI44))
-GLOBAL(movstrSI44):
+ .global GLOBAL(movmemSI44)
+ FUNC(GLOBAL(movmemSI44))
+GLOBAL(movmemSI44):
mov.l @(40,r5),r0
mov.l r0,@(40,r4)
- .global GLOBAL(movstrSI40)
- FUNC(GLOBAL(movstrSI40))
-GLOBAL(movstrSI40):
+ .global GLOBAL(movmemSI40)
+ FUNC(GLOBAL(movmemSI40))
+GLOBAL(movmemSI40):
mov.l @(36,r5),r0
mov.l r0,@(36,r4)
- .global GLOBAL(movstrSI36)
- FUNC(GLOBAL(movstrSI36))
-GLOBAL(movstrSI36):
+ .global GLOBAL(movmemSI36)
+ FUNC(GLOBAL(movmemSI36))
+GLOBAL(movmemSI36):
mov.l @(32,r5),r0
mov.l r0,@(32,r4)
- .global GLOBAL(movstrSI32)
- FUNC(GLOBAL(movstrSI32))
-GLOBAL(movstrSI32):
+ .global GLOBAL(movmemSI32)
+ FUNC(GLOBAL(movmemSI32))
+GLOBAL(movmemSI32):
mov.l @(28,r5),r0
mov.l r0,@(28,r4)
- .global GLOBAL(movstrSI28)
- FUNC(GLOBAL(movstrSI28))
-GLOBAL(movstrSI28):
+ .global GLOBAL(movmemSI28)
+ FUNC(GLOBAL(movmemSI28))
+GLOBAL(movmemSI28):
mov.l @(24,r5),r0
mov.l r0,@(24,r4)
- .global GLOBAL(movstrSI24)
- FUNC(GLOBAL(movstrSI24))
-GLOBAL(movstrSI24):
+ .global GLOBAL(movmemSI24)
+ FUNC(GLOBAL(movmemSI24))
+GLOBAL(movmemSI24):
mov.l @(20,r5),r0
mov.l r0,@(20,r4)
- .global GLOBAL(movstrSI20)
- FUNC(GLOBAL(movstrSI20))
-GLOBAL(movstrSI20):
+ .global GLOBAL(movmemSI20)
+ FUNC(GLOBAL(movmemSI20))
+GLOBAL(movmemSI20):
mov.l @(16,r5),r0
mov.l r0,@(16,r4)
- .global GLOBAL(movstrSI16)
- FUNC(GLOBAL(movstrSI16))
-GLOBAL(movstrSI16):
+ .global GLOBAL(movmemSI16)
+ FUNC(GLOBAL(movmemSI16))
+GLOBAL(movmemSI16):
mov.l @(12,r5),r0
mov.l r0,@(12,r4)
- .global GLOBAL(movstrSI12)
- FUNC(GLOBAL(movstrSI12))
-GLOBAL(movstrSI12):
+ .global GLOBAL(movmemSI12)
+ FUNC(GLOBAL(movmemSI12))
+GLOBAL(movmemSI12):
mov.l @(8,r5),r0
mov.l r0,@(8,r4)
- .global GLOBAL(movstrSI8)
- FUNC(GLOBAL(movstrSI8))
-GLOBAL(movstrSI8):
+ .global GLOBAL(movmemSI8)
+ FUNC(GLOBAL(movmemSI8))
+GLOBAL(movmemSI8):
mov.l @(4,r5),r0
mov.l r0,@(4,r4)
- .global GLOBAL(movstrSI4)
- FUNC(GLOBAL(movstrSI4))
-GLOBAL(movstrSI4):
+ .global GLOBAL(movmemSI4)
+ FUNC(GLOBAL(movmemSI4))
+GLOBAL(movmemSI4):
mov.l @(0,r5),r0
mov.l r0,@(0,r4)
- .global GLOBAL(movstrSI0)
- FUNC(GLOBAL(movstrSI0))
-GLOBAL(movstrSI0):
+ .global GLOBAL(movmemSI0)
+ FUNC(GLOBAL(movmemSI0))
+GLOBAL(movmemSI0):
rts
nop
- ENDFUNC(GLOBAL(movstrSI64))
- ENDFUNC(GLOBAL(movstrSI60))
- ENDFUNC(GLOBAL(movstrSI56))
- ENDFUNC(GLOBAL(movstrSI52))
- ENDFUNC(GLOBAL(movstrSI48))
- ENDFUNC(GLOBAL(movstrSI44))
- ENDFUNC(GLOBAL(movstrSI40))
- ENDFUNC(GLOBAL(movstrSI36))
- ENDFUNC(GLOBAL(movstrSI32))
- ENDFUNC(GLOBAL(movstrSI28))
- ENDFUNC(GLOBAL(movstrSI24))
- ENDFUNC(GLOBAL(movstrSI20))
- ENDFUNC(GLOBAL(movstrSI16))
- ENDFUNC(GLOBAL(movstrSI12))
- ENDFUNC(GLOBAL(movstrSI8))
- ENDFUNC(GLOBAL(movstrSI4))
- ENDFUNC(GLOBAL(movstrSI0))
+ ENDFUNC(GLOBAL(movmemSI64))
+ ENDFUNC(GLOBAL(movmemSI60))
+ ENDFUNC(GLOBAL(movmemSI56))
+ ENDFUNC(GLOBAL(movmemSI52))
+ ENDFUNC(GLOBAL(movmemSI48))
+ ENDFUNC(GLOBAL(movmemSI44))
+ ENDFUNC(GLOBAL(movmemSI40))
+ ENDFUNC(GLOBAL(movmemSI36))
+ ENDFUNC(GLOBAL(movmemSI32))
+ ENDFUNC(GLOBAL(movmemSI28))
+ ENDFUNC(GLOBAL(movmemSI24))
+ ENDFUNC(GLOBAL(movmemSI20))
+ ENDFUNC(GLOBAL(movmemSI16))
+ ENDFUNC(GLOBAL(movmemSI12))
+ ENDFUNC(GLOBAL(movmemSI8))
+ ENDFUNC(GLOBAL(movmemSI4))
+ ENDFUNC(GLOBAL(movmemSI0))
.align 4
- .global GLOBAL(movstr)
- FUNC(GLOBAL(movstr))
-GLOBAL(movstr):
+ .global GLOBAL(movmem)
+ FUNC(GLOBAL(movmem))
+GLOBAL(movmem):
mov.l @(60,r5),r0
mov.l r0,@(60,r4)
@@ -885,36 +885,36 @@ GLOBAL(movstr):
bf done
add #64,r5
- bra GLOBAL(movstr)
+ bra GLOBAL(movmem)
add #64,r4
- FUNC(GLOBAL(movstr))
+ FUNC(GLOBAL(movmem))
#endif
-#ifdef L_movstr_i4
+#ifdef L_movmem_i4
.text
- .global GLOBAL(movstr_i4_even)
- .global GLOBAL(movstr_i4_odd)
- .global GLOBAL(movstrSI12_i4)
-
- FUNC(GLOBAL(movstr_i4_even))
- FUNC(GLOBAL(movstr_i4_odd))
- FUNC(GLOBAL(movstrSI12_i4))
+ .global GLOBAL(movmem_i4_even)
+ .global GLOBAL(movmem_i4_odd)
+ .global GLOBAL(movmemSI12_i4)
+
+ FUNC(GLOBAL(movmem_i4_even))
+ FUNC(GLOBAL(movmem_i4_odd))
+ FUNC(GLOBAL(movmemSI12_i4))
.p2align 5
-L_movstr_2mod4_end:
+L_movmem_2mod4_end:
mov.l r0,@(16,r4)
rts
mov.l r1,@(20,r4)
.p2align 2
-GLOBAL(movstr_i4_even):
+GLOBAL(movmem_i4_even):
mov.l @r5+,r0
- bra L_movstr_start_even
+ bra L_movmem_start_even
mov.l @r5+,r1
-GLOBAL(movstr_i4_odd):
+GLOBAL(movmem_i4_odd):
mov.l @r5+,r1
add #-4,r4
mov.l @r5+,r2
@@ -922,29 +922,29 @@ GLOBAL(movstr_i4_odd):
mov.l r1,@(4,r4)
mov.l r2,@(8,r4)
-L_movstr_loop:
+L_movmem_loop:
mov.l r3,@(12,r4)
dt r6
mov.l @r5+,r0
- bt/s L_movstr_2mod4_end
+ bt/s L_movmem_2mod4_end
mov.l @r5+,r1
add #16,r4
-L_movstr_start_even:
+L_movmem_start_even:
mov.l @r5+,r2
mov.l @r5+,r3
mov.l r0,@r4
dt r6
mov.l r1,@(4,r4)
- bf/s L_movstr_loop
+ bf/s L_movmem_loop
mov.l r2,@(8,r4)
rts
mov.l r3,@(12,r4)
- ENDFUNC(GLOBAL(movstr_i4_even))
- ENDFUNC(GLOBAL(movstr_i4_odd))
+ ENDFUNC(GLOBAL(movmem_i4_even))
+ ENDFUNC(GLOBAL(movmem_i4_odd))
.p2align 4
-GLOBAL(movstrSI12_i4):
+GLOBAL(movmemSI12_i4):
mov.l @r5,r0
mov.l @(4,r5),r1
mov.l @(8,r5),r2
@@ -953,7 +953,7 @@ GLOBAL(movstrSI12_i4):
rts
mov.l r2,@(8,r4)
- ENDFUNC(GLOBAL(movstrSI12_i4))
+ ENDFUNC(GLOBAL(movmemSI12_i4))
#endif
#ifdef L_mulsi3
Index: gcc/config/sh/sh.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.c,v
retrieving revision 1.275
diff -u -p -r1.275 sh.c
--- gcc/config/sh/sh.c 3 Jul 2004 11:56:43 -0000 1.275
+++ gcc/config/sh/sh.c 7 Jul 2004 06:18:03 -0000
@@ -771,7 +771,7 @@ expand_block_move (rtx *operands)
rtx r4 = gen_rtx_REG (SImode, 4);
rtx r5 = gen_rtx_REG (SImode, 5);
- entry_name = get_identifier ("__movstrSI12_i4");
+ entry_name = get_identifier ("__movmemSI12_i4");
sym = function_symbol (IDENTIFIER_POINTER (entry_name));
func_addr_rtx = copy_to_mode_reg (Pmode, sym);
@@ -791,8 +791,8 @@ expand_block_move (rtx *operands)
rtx r6 = gen_rtx_REG (SImode, 6);
entry_name = get_identifier (bytes & 4
- ? "__movstr_i4_odd"
- : "__movstr_i4_even");
+ ? "__movmem_i4_odd"
+ : "__movmem_i4_even");
sym = function_symbol (IDENTIFIER_POINTER (entry_name));
func_addr_rtx = copy_to_mode_reg (Pmode, sym);
force_into (XEXP (operands[0], 0), r4);
@@ -815,7 +815,7 @@ expand_block_move (rtx *operands)
rtx r4 = gen_rtx_REG (SImode, 4);
rtx r5 = gen_rtx_REG (SImode, 5);
- sprintf (entry, "__movstrSI%d", bytes);
+ sprintf (entry, "__movmemSI%d", bytes);
entry_name = get_identifier (entry);
sym = function_symbol (IDENTIFIER_POINTER (entry_name));
func_addr_rtx = copy_to_mode_reg (Pmode, sym);
@@ -837,7 +837,7 @@ expand_block_move (rtx *operands)
rtx r5 = gen_rtx_REG (SImode, 5);
rtx r6 = gen_rtx_REG (SImode, 6);
- entry_name = get_identifier ("__movstr");
+ entry_name = get_identifier ("__movmem");
sym = function_symbol (IDENTIFIER_POINTER (entry_name));
func_addr_rtx = copy_to_mode_reg (Pmode, sym);
force_into (XEXP (operands[0], 0), r4);
Index: gcc/config/sh/sh.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.md,v
retrieving revision 1.174
diff -u -p -r1.174 sh.md
--- gcc/config/sh/sh.md 3 Jul 2004 11:56:43 -0000 1.174
+++ gcc/config/sh/sh.md 7 Jul 2004 06:18:07 -0000
@@ -8088,7 +8088,7 @@ mov.l\\t1f,r0\\n\\
;; String/block move insn.
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (mem:BLK (match_operand:BLK 0 "" ""))
(mem:BLK (match_operand:BLK 1 "" "")))
(use (match_operand:SI 2 "nonmemory_operand" ""))
Index: gcc/config/sh/t-sh
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/t-sh,v
retrieving revision 1.17
diff -u -p -r1.17 t-sh
--- gcc/config/sh/t-sh 21 Jun 2004 18:18:40 -0000 1.17
+++ gcc/config/sh/t-sh 7 Jul 2004 06:18:07 -0000
@@ -1,6 +1,6 @@
LIB1ASMSRC = sh/lib1funcs.asm
-LIB1ASMFUNCS = _ashiftrt _ashiftrt_n _ashiftlt _lshiftrt _movstr \
- _movstr_i4 _mulsi3 _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \
+LIB1ASMFUNCS = _ashiftrt _ashiftrt_n _ashiftlt _lshiftrt _movmem \
+ _movmem_i4 _mulsi3 _sdivsi3 _sdivsi3_i4 _udivsi3 _udivsi3_i4 _set_fpscr \
$(LIB1ASMFUNCS_CACHE)
# We want fine grained libraries, so use the new code to build the
Index: gcc/config/sparc/sparc.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sparc/sparc.h,v
retrieving revision 1.259
diff -u -p -r1.259 sparc.h
--- gcc/config/sparc/sparc.h 5 Jul 2004 19:49:18 -0000 1.259
+++ gcc/config/sparc/sparc.h 7 Jul 2004 06:18:10 -0000
@@ -2176,7 +2176,7 @@ do {
#define MOVE_MAX 8
/* If a memory-to-memory move would take MOVE_RATIO or more simple
- move-instruction pairs, we will do a movstr or libcall instead. */
+ move-instruction pairs, we will do a movmem or libcall instead. */
#define MOVE_RATIO (optimize_size ? 3 : 8)
Index: gcc/config/vax/vax.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/vax/vax.md,v
retrieving revision 1.25
diff -u -p -r1.25 vax.md
--- gcc/config/vax/vax.md 1 Jul 2003 01:15:07 -0000 1.25
+++ gcc/config/vax/vax.md 7 Jul 2004 06:18:11 -0000
@@ -298,15 +298,15 @@
}")
;; This is here to accept 4 arguments and pass the first 3 along
-;; to the movstrhi1 pattern that really does the work.
-(define_expand "movstrhi"
+;; to the movmemhi1 pattern that really does the work.
+(define_expand "movmemhi"
[(set (match_operand:BLK 0 "general_operand" "=g")
(match_operand:BLK 1 "general_operand" "g"))
(use (match_operand:HI 2 "general_operand" "g"))
(match_operand 3 "" "")]
""
"
- emit_insn (gen_movstrhi1 (operands[0], operands[1], operands[2]));
+ emit_insn (gen_movmemhi1 (operands[0], operands[1], operands[2]));
DONE;
")
@@ -314,7 +314,7 @@
;; but it should suffice
;; that anything generated as this insn will be recognized as one
;; and that it won't successfully combine with anything.
-(define_insn "movstrhi1"
+(define_insn "movmemhi1"
[(set (match_operand:BLK 0 "memory_operand" "=m")
(match_operand:BLK 1 "memory_operand" "m"))
(use (match_operand:HI 2 "general_operand" "g"))
Index: gcc/config/xtensa/xtensa.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.c,v
retrieving revision 1.59
diff -u -p -r1.59 xtensa.c
--- gcc/config/xtensa/xtensa.c 22 Jun 2004 03:06:55 -0000 1.59
+++ gcc/config/xtensa/xtensa.c 7 Jul 2004 06:18:12 -0000
@@ -1464,7 +1464,7 @@ xtensa_expand_block_move (rtx *operands)
operands[0] = validize_mem (dest);
operands[1] = validize_mem (src);
- emit_insn (gen_movstrsi_internal (operands[0], operands[1],
+ emit_insn (gen_movmemsi_internal (operands[0], operands[1],
operands[2], operands[3]));
return 1;
}
Index: gcc/config/xtensa/xtensa.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/xtensa/xtensa.md,v
retrieving revision 1.20
diff -u -p -r1.20 xtensa.md
--- gcc/config/xtensa/xtensa.md 18 Jun 2004 19:38:27 -0000 1.20
+++ gcc/config/xtensa/xtensa.md 7 Jul 2004 06:18:13 -0000
@@ -1057,7 +1057,7 @@
;; Block moves
-(define_expand "movstrsi"
+(define_expand "movmemsi"
[(parallel [(set (match_operand:BLK 0 "" "")
(match_operand:BLK 1 "" ""))
(use (match_operand:SI 2 "arith_operand" ""))
@@ -1069,7 +1069,7 @@
DONE;
})
-(define_insn "movstrsi_internal"
+(define_insn "movmemsi_internal"
[(set (match_operand:BLK 0 "memory_operand" "=U")
(match_operand:BLK 1 "memory_operand" "U"))
(use (match_operand:SI 2 "arith_operand" ""))
Index: gcc/doc/invoke.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/invoke.texi,v
retrieving revision 1.479
diff -u -p -r1.479 invoke.texi
--- gcc/doc/invoke.texi 5 Jul 2004 19:49:20 -0000 1.479
+++ gcc/doc/invoke.texi 7 Jul 2004 06:18:23 -0000
@@ -9603,12 +9603,12 @@ Generate code for a PDP-11/10.
@item -mbcopy-builtin
@opindex bcopy-builtin
-Use inline @code{movstrhi} patterns for copying memory. This is the
+Use inline @code{movmemhi} patterns for copying memory. This is the
default.
@item -mbcopy
@opindex mbcopy
-Do not use inline @code{movstrhi} patterns for copying memory.
+Do not use inline @code{movmemhi} patterns for copying memory.
@item -mint16
@itemx -mno-int32
Index: gcc/doc/md.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/md.texi,v
retrieving revision 1.102
diff -u -p -r1.102 md.texi
--- gcc/doc/md.texi 2 Jul 2004 23:57:12 -0000 1.102
+++ gcc/doc/md.texi 7 Jul 2004 06:18:29 -0000
@@ -2776,8 +2776,8 @@ not use @code{(cc0)}. Doing so would co
would no longer be clear which @code{set} operations were comparisons.
The @samp{cmp@var{m}} patterns should be used instead.
-@cindex @code{movstr@var{m}} instruction pattern
-@item @samp{movstr@var{m}}
+@cindex @code{movmem@var{m}} instruction pattern
+@item @samp{movmem@var{m}}
Block move instruction. The addresses of the destination and source
strings are the first two operands, and both are in mode @code{Pmode}.
@@ -2794,20 +2794,20 @@ destination, in the form of a @code{cons
compiler knows that both source and destination are word-aligned,
it may provide the value 4 for this operand.
-Descriptions of multiple @code{movstr@var{m}} patterns can only be
+Descriptions of multiple @code{movmem@var{m}} patterns can only be
beneficial if the patterns for smaller modes have fewer restrictions
on their first, second and fourth operands. Note that the mode @var{m}
-in @code{movstr@var{m}} does not impose any restriction on the mode of
+in @code{movmem@var{m}} does not impose any restriction on the mode of
individually moved data units in the block.
These patterns need not give special consideration to the possibility
that the source and destination strings might overlap.
-@cindex @code{clrstr@var{m}} instruction pattern
-@item @samp{clrstr@var{m}}
+@cindex @code{clrmem@var{m}} instruction pattern
+@item @samp{clrmem@var{m}}
Block clear instruction. The addresses of the destination string is the
first operand, in mode @code{Pmode}. The number of bytes to clear is
-the second operand, in mode @var{m}. See @samp{movstr@var{m}} for
+the second operand, in mode @var{m}. See @samp{movmem@var{m}} for
a discussion of the choice of mode.
The third operand is the known alignment of the destination, in the form
@@ -2815,13 +2815,13 @@ of a @code{const_int} rtx. Thus, if the
destination is word-aligned, it may provide the value 4 for this
operand.
-The use for multiple @code{clrstr@var{m}} is as for @code{movstr@var{m}}.
+The use for multiple @code{clrmem@var{m}} is as for @code{movmem@var{m}}.
@cindex @code{cmpstr@var{m}} instruction pattern
@item @samp{cmpstr@var{m}}
String compare instruction, with five operands. Operand 0 is the output;
it has mode @var{m}. The remaining four operands are like the operands
-of @samp{movstr@var{m}}. The two memory blocks specified are compared
+of @samp{movmem@var{m}}. The two memory blocks specified are compared
byte by byte in lexicographic order starting at the beginning of each
string. The instruction is not allowed to prefetch more than one byte
at a time since either string may end in the first byte and reading past
Index: gcc/doc/rtl.texi
===================================================================
RCS file: /cvs/gcc/gcc/gcc/doc/rtl.texi,v
retrieving revision 1.67
diff -u -p -r1.67 rtl.texi
--- gcc/doc/rtl.texi 13 May 2004 06:40:27 -0000 1.67
+++ gcc/doc/rtl.texi 7 Jul 2004 06:18:32 -0000
@@ -2550,7 +2550,7 @@ that the register is live. You should t
instead. The @code{use} RTX is most commonly useful to describe that
a fixed register is implicitly used in an insn. It is also safe to use
in patterns where the compiler knows for other reasons that the result
-of the whole pattern is variable, such as @samp{movstr@var{m}} or
+of the whole pattern is variable, such as @samp{movmem@var{m}} or
@samp{call} patterns.
During the reload phase, an insn that has a @code{use} as pattern
Index: gcc/po/be.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/be.po,v
retrieving revision 1.4
diff -u -p -r1.4 be.po
--- gcc/po/be.po 15 May 2004 19:13:01 -0000 1.4
+++ gcc/po/be.po 7 Jul 2004 06:18:41 -0000
@@ -11589,7 +11589,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/ca.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/ca.po,v
retrieving revision 1.2
diff -u -p -r1.2 ca.po
--- gcc/po/ca.po 15 May 2004 19:13:01 -0000 1.2
+++ gcc/po/ca.po 7 Jul 2004 06:18:53 -0000
@@ -11735,7 +11735,7 @@ msgstr "5Generar codi per a un 11/45"
msgid "Generate code for an 11/10"
msgstr "Generar codi per a un 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/da.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/da.po,v
retrieving revision 1.5
diff -u -p -r1.5 da.po
--- gcc/po/da.po 15 May 2004 19:13:02 -0000 1.5
+++ gcc/po/da.po 7 Jul 2004 06:19:08 -0000
@@ -11864,7 +11864,7 @@ msgstr "GenerÃr kode til en 11/45"
msgid "Generate code for an 11/10"
msgstr "GenerÃr kode til en 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/de.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/de.po,v
retrieving revision 1.13
diff -u -p -r1.13 de.po
--- gcc/po/de.po 15 May 2004 19:13:02 -0000 1.13
+++ gcc/po/de.po 7 Jul 2004 06:19:19 -0000
@@ -11482,7 +11482,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/el.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/el.po,v
retrieving revision 1.5
diff -u -p -r1.5 el.po
--- gcc/po/el.po 15 May 2004 19:13:03 -0000 1.5
+++ gcc/po/el.po 7 Jul 2004 06:19:28 -0000
@@ -11814,7 +11814,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/es.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/es.po,v
retrieving revision 1.10
diff -u -p -r1.10 es.po
--- gcc/po/es.po 23 May 2004 01:11:39 -0000 1.10
+++ gcc/po/es.po 7 Jul 2004 06:19:45 -0000
@@ -11477,7 +11477,7 @@ msgstr "Generar cÃdigo para un 11/45"
msgid "Generate code for an 11/10"
msgstr "Generar cÃdigo para un 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/fr.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/fr.po,v
retrieving revision 1.15
diff -u -p -r1.15 fr.po
--- gcc/po/fr.po 26 May 2004 09:20:56 -0000 1.15
+++ gcc/po/fr.po 7 Jul 2004 06:20:02 -0000
@@ -11613,7 +11613,7 @@ msgstr "GÃnÃrer du code pour un 11/45"
msgid "Generate code for an 11/10"
msgstr "GÃnÃrer du code pour un 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/gcc.pot
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/gcc.pot,v
retrieving revision 1.25
diff -u -p -r1.25 gcc.pot
--- gcc/po/gcc.pot 18 May 2004 01:26:17 -0000 1.25
+++ gcc/po/gcc.pot 7 Jul 2004 06:20:09 -0000
@@ -11491,7 +11491,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/ja.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/ja.po,v
retrieving revision 1.6
diff -u -p -r1.6 ja.po
--- gcc/po/ja.po 15 May 2004 19:13:05 -0000 1.6
+++ gcc/po/ja.po 7 Jul 2004 06:20:23 -0000
@@ -12003,7 +12003,7 @@ msgstr "11/45 ÃÃÂÃÂÂÂÂÂÃÂÃÃÂÃÂÂÂÂÃ"
msgid "Generate code for an 11/10"
msgstr "11/10 ÃÃÂÃÂÂÂÂÂÃÂÃÃÂÃÂÂÂÂÃ"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/nl.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/nl.po,v
retrieving revision 1.6
diff -u -p -r1.6 nl.po
--- gcc/po/nl.po 15 May 2004 19:13:09 -0000 1.6
+++ gcc/po/nl.po 7 Jul 2004 06:20:33 -0000
@@ -11932,7 +11932,7 @@ msgstr ""
msgid "Generate code for an 11/10"
msgstr ""
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/sv.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/sv.po,v
retrieving revision 1.7
diff -u -p -r1.7 sv.po
--- gcc/po/sv.po 15 May 2004 19:13:09 -0000 1.7
+++ gcc/po/sv.po 7 Jul 2004 06:20:43 -0000
@@ -11862,7 +11862,7 @@ msgstr "Generera kod fÃr 11/45"
msgid "Generate code for an 11/10"
msgstr "Generera kod fÃr 11/10"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/po/tr.po
===================================================================
RCS file: /cvs/gcc/gcc/gcc/po/tr.po,v
retrieving revision 1.8
diff -u -p -r1.8 tr.po
--- gcc/po/tr.po 21 May 2004 22:24:47 -0000 1.8
+++ gcc/po/tr.po 7 Jul 2004 06:21:00 -0000
@@ -11549,7 +11549,7 @@ msgstr "Kod bir 11/45 iÃÂin ÃÂretilir"
msgid "Generate code for an 11/10"
msgstr "Kod bir 11/10 iÃÂin ÃÂretilir"
-#. use movstrhi for bcopy
+#. use movmemhi for bcopy
#. use 32 bit for int
#: config/pdp11/pdp11.h:78 config/pdp11/pdp11.h:79
msgid "Use 32 bit int"
Index: gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c,v
retrieving revision 1.1
diff -u -p -r1.1 mempcpy-2.c
--- gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c 3 Jul 2004 02:16:49 -0000 1.1
+++ gcc/testsuite/gcc.c-torture/execute/builtins/mempcpy-2.c 7 Jul 2004 06:21:05 -0000
@@ -68,7 +68,7 @@ test (long *buf3, char *buf4, char *buf6
__builtin_memcpy (buf3, "aBcdEFghijklmnopq\0", 19);
- /* These should be handled either by movstrendM or mempcpy
+ /* These should be handled either by movmemendM or mempcpy
call. */
if (mempcpy ((char *) buf3 + 4, buf5, n + 6) != (char *) buf1 + 10
|| memcmp (buf1, "aBcdRSTUVWklmnopq\0", 19))
@@ -125,7 +125,7 @@ test (long *buf3, char *buf4, char *buf6
__builtin_memcpy (buf4, "aBcdEFghijklmnopq\0", 19);
- /* These should be handled either by movstrendM or mempcpy
+ /* These should be handled either by movmemendM or mempcpy
call. */
if (mempcpy (buf4 + 4, buf7, n + 6) != buf2 + 10
|| memcmp (buf2, "aBcdRSTUVWklmnopq\0", 19))
--
Alexandre Oliva http://www.ic.unicamp.br/~oliva/
Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org}
Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org}