This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: patch: unmacroize HARD_REGNO_* on PPC


On Mon, May 03, 2004 at 10:04:52PM -0400, David Edelsohn wrote:
> 	The HARD_REGNO_NREGS change is okay.
> 
> 	Please profile the HARD_REGNO_MODE_OK change to see if that
> function becomes a hot spot.  I want to know the effect on compile time
> before deciding whether that should be converted to a function.

Below is the patch I'm committing.

I'm rewriting HARD_REGNO_MODE_OK to cache the results in a separate
patch.

Thanks.

	* config/rs6000/rs6000-protos.h: Protoize rs6000_hard_regno_nregs.

	* config/rs6000/rs6000.c (rs6000_hard_regno_nregs): New.

	* config/rs6000/rs6000.h (HARD_REGNO_NREGS): Call
	rs6000_hard_regno_nregs.

Index: config/rs6000/rs6000-protos.h
===================================================================
RCS file: /cvs/uberbaum/gcc/config/rs6000/rs6000-protos.h,v
retrieving revision 1.78
diff -c -p -r1.78 rs6000-protos.h
*** config/rs6000/rs6000-protos.h	28 Apr 2004 23:03:26 -0000	1.78
--- config/rs6000/rs6000-protos.h	4 May 2004 02:21:35 -0000
*************** extern int rs6000_memory_move_cost (enum
*** 201,206 ****
--- 201,207 ----
  extern bool rs6000_tls_referenced_p (rtx);
  extern int rs6000_tls_symbol_ref (rtx, enum machine_mode);
  extern void rs6000_output_dwarf_dtprel (FILE*, int, rtx);
+ extern int rs6000_hard_regno_nregs (int, enum machine_mode);
  
  /* Declare functions in rs6000-c.c */
  
Index: config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/uberbaum/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.632
diff -c -p -r1.632 rs6000.c
*** config/rs6000/rs6000.c	29 Apr 2004 18:37:27 -0000	1.632
--- config/rs6000/rs6000.c	4 May 2004 02:21:44 -0000
*************** rs6000_mode_dependent_address (rtx addr)
*** 3343,3348 ****
--- 3343,3376 ----
  
    return false;
  }
+ 
+ /* Return number of consecutive hard regs needed starting at reg REGNO
+    to hold something of mode MODE.
+    This is ordinarily the length in words of a value of mode MODE
+    but can be less for certain modes in special long registers.
+ 
+    For the SPE, GPRs are 64 bits but only 32 bits are visible in
+    scalar instructions.  The upper 32 bits are only available to the
+    SIMD instructions.
+ 
+    POWER and PowerPC GPRs hold 32 bits worth;
+    PowerPC64 GPRs and FPRs point register holds 64 bits worth.  */
+ 
+ int
+ rs6000_hard_regno_nregs (int regno, enum machine_mode mode)
+ {
+   if (FP_REGNO_P (regno))
+     return (GET_MODE_SIZE (mode) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD;
+ 
+   if (SPE_SIMD_REGNO_P (regno) && TARGET_SPE && SPE_VECTOR_MODE (mode))
+     return (GET_MODE_SIZE (mode) + UNITS_PER_SPE_WORD - 1) / UNITS_PER_SPE_WORD;
+ 
+   if (ALTIVEC_REGNO_P (regno))
+     return
+       (GET_MODE_SIZE (mode) + UNITS_PER_ALTIVEC_WORD - 1) / UNITS_PER_ALTIVEC_WORD;
+ 
+   return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD;
+ }
  
  /* Try to output insns to set TARGET equal to the constant C if it can
     be done in less than N insns.  Do all computations in MODE.
Index: config/rs6000/rs6000.h
===================================================================
RCS file: /cvs/uberbaum/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.320
diff -c -p -r1.320 rs6000.h
*** config/rs6000/rs6000.h	24 Apr 2004 06:37:19 -0000	1.320
--- config/rs6000/rs6000.h	4 May 2004 02:21:46 -0000
*************** extern const char *rs6000_warn_altivec_l
*** 997,1021 ****
  #define ALTIVEC_REGNO_P(N) ((N) >= FIRST_ALTIVEC_REGNO && (N) <= LAST_ALTIVEC_REGNO)
  
  /* Return number of consecutive hard regs needed starting at reg REGNO
!    to hold something of mode MODE.
!    This is ordinarily the length in words of a value of mode MODE
!    but can be less for certain modes in special long registers.
  
!    For the SPE, GPRs are 64 bits but only 32 bits are visible in
!    scalar instructions.  The upper 32 bits are only available to the
!    SIMD instructions.
! 
!    POWER and PowerPC GPRs hold 32 bits worth;
!    PowerPC64 GPRs and FPRs point register holds 64 bits worth.  */
! 
! #define HARD_REGNO_NREGS(REGNO, MODE)					\
!   (FP_REGNO_P (REGNO)							\
!    ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
!    : (SPE_SIMD_REGNO_P (REGNO) && TARGET_SPE && SPE_VECTOR_MODE (MODE))   \
!    ? ((GET_MODE_SIZE (MODE) + UNITS_PER_SPE_WORD - 1) / UNITS_PER_SPE_WORD) \
!    : ALTIVEC_REGNO_P (REGNO)						\
!    ? ((GET_MODE_SIZE (MODE) + UNITS_PER_ALTIVEC_WORD - 1) / UNITS_PER_ALTIVEC_WORD) \
!    : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
  
  #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)	\
    ((TARGET_32BIT && TARGET_POWERPC64			\
--- 997,1005 ----
  #define ALTIVEC_REGNO_P(N) ((N) >= FIRST_ALTIVEC_REGNO && (N) <= LAST_ALTIVEC_REGNO)
  
  /* Return number of consecutive hard regs needed starting at reg REGNO
!    to hold something of mode MODE.  */
  
! #define HARD_REGNO_NREGS(REGNO, MODE) rs6000_hard_regno_nregs ((REGNO), (MODE))
  
  #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE)	\
    ((TARGET_32BIT && TARGET_POWERPC64			\


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]