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Re: GCC Status Report (2004-03-09)
On Sat, Apr 03, 2004 at 08:29:20AM +0200, Eric Botcazou wrote:
> > 2004-04-01 Jakub Jelinek <jakuB@redhat.com>
> > Eric Botcazou <ebotcazou@libertysurf.fr>
> >
> > PR optimization/13424, optimization/12419
> > * explow.c (maybe_set_unchanging): Revert 2003-04-07 patch.
> > Set RTX_UNCHANGING_P even for read-only DECL_EXTERNAL decls.
> > * expr.c (store_constructor): When clearing aggregate because
> > of an incomplete or mostly zero constructor, do the clearing
> > without /u flag and then emit a blockage.
>
> This is not enough on PA, the testcase for PR opt/8634 is now failing again
> (see PR c/14828).
I believe this is a hppa backend bug.
The /u flag, as well as /s and
MEM_EXPR/MEM_OFFSET/MEM_SIZE/MEM_ALIAS_SET/MEM_ALIGN memory attributes
are clearly lost from the movstrsi* patterns during post-reload splitting
or peephole2.
I have tried to change the splitter and peephole2 for this insn and indeed
the generated code was quite different, though I was lazy to study it in
all details and have no PA to actually check.
If this patch indeed cures the problem, then I believe there are several
similar problems in pa.md.
--- pa.md.jj 2004-03-08 18:49:33.000000000 +0100
+++ pa.md 2004-04-03 14:12:09.039208037 +0200
@@ -3206,8 +3206,8 @@
[(set_attr "type" "multi,multi")])
(define_split
- [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" ""))
- (mem:BLK (match_operand:SI 1 "register_operand" "")))
+ [(parallel [(set (match_operand:BLK 0 "memory_operand" "")
+ (match_operand:BLK 1 "memory_operand" ""))
(clobber (match_operand:SI 2 "register_operand" ""))
(clobber (match_operand:SI 3 "register_operand" ""))
(clobber (match_operand:SI 6 "register_operand" ""))
@@ -3215,10 +3215,14 @@
(clobber (match_operand:SI 8 "register_operand" ""))
(use (match_operand:SI 4 "arith_operand" ""))
(use (match_operand:SI 5 "const_int_operand" ""))])]
- "!TARGET_64BIT && reload_completed && !flag_peephole2"
- [(set (match_dup 7) (match_dup 0))
- (set (match_dup 8) (match_dup 1))
- (parallel [(set (mem:BLK (match_dup 7)) (mem:BLK (match_dup 8)))
+ "!TARGET_64BIT && reload_completed && !flag_peephole2
+ && GET_CODE (operands[0]) == MEM
+ && register_operand (XEXP (operands[0], 0), SImode)
+ && GET_CODE (operands[1]) == MEM
+ && register_operand (XEXP (operands[1], 0), SImode)"
+ [(set (match_dup 7) (match_dup 9))
+ (set (match_dup 8) (match_dup 10))
+ (parallel [(set (match_dup 0) (match_dup 1))
(clobber (match_dup 2))
(clobber (match_dup 3))
(clobber (match_dup 6))
@@ -3227,11 +3231,17 @@
(use (match_dup 4))
(use (match_dup 5))
(const_int 0)])]
- "")
+ "
+{
+ operands[9] = XEXP (operands[0], 0);
+ operands[10] = XEXP (operands[1], 0);
+ operands[0] = replace_equiv_address (operands[0], operands[7]);
+ operands[1] = replace_equiv_address (operands[1], operands[8]);
+}")
(define_peephole2
- [(parallel [(set (mem:BLK (match_operand:SI 0 "register_operand" ""))
- (mem:BLK (match_operand:SI 1 "register_operand" "")))
+ [(parallel [(set (match_operand:BLK 0 "memory_operand" "")
+ (match_operand:BLK 1 "memory_operand" ""))
(clobber (match_operand:SI 2 "register_operand" ""))
(clobber (match_operand:SI 3 "register_operand" ""))
(clobber (match_operand:SI 6 "register_operand" ""))
@@ -3239,8 +3249,12 @@
(clobber (match_operand:SI 8 "register_operand" ""))
(use (match_operand:SI 4 "arith_operand" ""))
(use (match_operand:SI 5 "const_int_operand" ""))])]
- "!TARGET_64BIT"
- [(parallel [(set (mem:BLK (match_dup 7)) (mem:BLK (match_dup 8)))
+ "!TARGET_64BIT
+ && GET_CODE (operands[0]) == MEM
+ && register_operand (XEXP (operands[0], 0), SImode)
+ && GET_CODE (operands[1]) == MEM
+ && register_operand (XEXP (operands[1], 0), SImode)"
+ [(parallel [(set (match_dup 0) (match_dup 1))
(clobber (match_dup 2))
(clobber (match_dup 3))
(clobber (match_dup 6))
@@ -3251,15 +3265,23 @@
(const_int 0)])]
"
{
- if (dead_or_set_p (curr_insn, operands[0]))
- operands[7] = operands[0];
+ rtx addr = XEXP (operands[0], 0);
+ if (dead_or_set_p (curr_insn, addr))
+ operands[7] = addr;
else
- emit_insn (gen_rtx_SET (VOIDmode, operands[7], operands[0]));
+ {
+ emit_insn (gen_rtx_SET (VOIDmode, operands[7], addr));
+ operands[0] = replace_equiv_address (operands[0], operands[7]);
+ }
- if (dead_or_set_p (curr_insn, operands[1]))
- operands[8] = operands[1];
+ addr = XEXP (operands[1], 0);
+ if (dead_or_set_p (curr_insn, addr))
+ operands[8] = addr;
else
- emit_insn (gen_rtx_SET (VOIDmode, operands[8], operands[1]));
+ {
+ emit_insn (gen_rtx_SET (VOIDmode, operands[8], addr));
+ operands[1] = replace_equiv_address (operands[1], operands[8]);
+ }
}")
(define_insn "movstrsi_postreload"
Jakub