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powerpc64 long double and complex va_arg support
- From: Alan Modra <amodra at bigpond dot net dot au>
- To: gcc-patches at gcc dot gnu dot org
- Date: Sat, 7 Feb 2004 22:30:22 +1030
- Subject: powerpc64 long double and complex va_arg support
This one handles a function call where a long double is passed partially
in f13 and partially on the stack, and also does the packing required to
reassemble complex float and complex int types smaller than long in
va_arg. I don't intend to commit the #if 0 code in rs6000_va_arg, it's
just there because someone might like to investigate why it fails.
Alpha uses similar code, apparently successfully. We can't for some
reason, I'm guessing because rs6000_split_multireg_move is missing code
to preserve mem attrs. In any case, the #else variation generate better
code.
Moving RS6000_ARG_SIZE to a function generates better code, especially
on a ppc32 -> ppc64 cross where all the arithmetic is done in long long
when using a macro. In other builds we get smaller code, a good thing
on modern machines where smaller cache footprint is a win.
* config/rs6000/rs6000.h (UNITS_PER_ARG, RS6000_ARG_SIZE): Delete.
(HARD_REGNO_MODE_OK): Disallow TFmode for fp31.
* config/rs6000/rs6000.c (rs6000_arg_size): New function.
Update all users of RS6000_ARG_SIZE.
(function_arg_advance): Count fregno using mode size.
(function_arg): Handle long double split over regs and memory.
(function_arg_partial_nregs): Likewise.
(rs6000_va_arg): Repackage complex args.
Bootstrapped etc. powerpc64-linux. OK mainline?
Index: gcc/config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.593
diff -u -p -r1.593 rs6000.c
--- gcc/config/rs6000/rs6000.c 7 Feb 2004 03:06:46 -0000 1.593
+++ gcc/config/rs6000/rs6000.c 7 Feb 2004 04:09:47 -0000
@@ -3958,6 +3958,24 @@ function_arg_boundary (enum machine_mode
else
return PARM_BOUNDARY;
}
+
+/* Compute the size (in words) of a function argument. */
+
+static unsigned long
+rs6000_arg_size (enum machine_mode mode, tree type)
+{
+ unsigned long size;
+
+ if (mode != BLKmode)
+ size = GET_MODE_SIZE (mode);
+ else
+ size = int_size_in_bytes (type);
+
+ if (TARGET_32BIT)
+ return (size + 3) >> 2;
+ else
+ return (size + 7) >> 3;
+}
/* Update the data in CUM to advance over an argument
of mode MODE and data type TYPE.
@@ -3993,7 +4011,7 @@ function_arg_advance (CUMULATIVE_ARGS *c
align = ((6 - (cum->words & 3)) & 3);
else
align = cum->words & 1;
- cum->words += align + RS6000_ARG_SIZE (mode, type);
+ cum->words += align + rs6000_arg_size (mode, type);
if (TARGET_DEBUG_ARG)
{
@@ -4020,7 +4038,7 @@ function_arg_advance (CUMULATIVE_ARGS *c
{
if (mode == DFmode)
cum->words += cum->words & 1;
- cum->words += RS6000_ARG_SIZE (mode, type);
+ cum->words += rs6000_arg_size (mode, type);
}
}
else
@@ -4033,7 +4051,7 @@ function_arg_advance (CUMULATIVE_ARGS *c
|| mode == TFmode)
n_words = 1;
else
- n_words = RS6000_ARG_SIZE (mode, type);
+ n_words = rs6000_arg_size (mode, type);
/* Long long and SPE vectors are put in odd registers. */
if (n_words == 2 && (gregno & 1) == 0)
@@ -4070,11 +4088,11 @@ function_arg_advance (CUMULATIVE_ARGS *c
int align = (TARGET_32BIT && (cum->words & 1) != 0
&& function_arg_boundary (mode, type) == 64) ? 1 : 0;
- cum->words += align + RS6000_ARG_SIZE (mode, type);
+ cum->words += align + rs6000_arg_size (mode, type);
if (GET_MODE_CLASS (mode) == MODE_FLOAT
&& TARGET_HARD_FLOAT && TARGET_FPRS)
- cum->fregno += (mode == TFmode ? 2 : 1);
+ cum->fregno += (GET_MODE_SIZE (mode) + 7) >> 3;
if (TARGET_DEBUG_ARG)
{
@@ -4096,7 +4114,7 @@ rs6000_spe_function_arg (CUMULATIVE_ARGS
if (cum->stdarg)
{
int gregno = cum->sysv_gregno;
- int n_words = RS6000_ARG_SIZE (mode, type);
+ int n_words = rs6000_arg_size (mode, type);
/* SPE vectors are put in odd registers. */
if (n_words == 2 && (gregno & 1) == 0)
@@ -4144,7 +4162,7 @@ rs6000_mixed_function_arg (CUMULATIVE_AR
gen_rtx_REG (mode,
cum->fregno),
const0_rtx)));
- else if (align_words + RS6000_ARG_SIZE (mode, type)
+ else if (align_words + rs6000_arg_size (mode, type)
> GP_ARG_NUM_REG)
/* If this is partially on the stack, then we only
include the portion actually in registers here. */
@@ -4368,13 +4386,13 @@ function_arg (CUMULATIVE_ARGS *cum, enum
|| mode == TFmode)
n_words = 1;
else
- n_words = RS6000_ARG_SIZE (mode, type);
+ n_words = rs6000_arg_size (mode, type);
/* Long long and SPE vectors are put in odd registers. */
if (n_words == 2 && (gregno & 1) == 0)
gregno += 1;
- /* Long long do not split between registers and stack. */
+ /* Long long does not split between registers and stack. */
if (gregno + n_words - 1 <= GP_ARG_MAX_REG)
return gen_rtx_REG (mode, gregno);
else
@@ -4396,35 +4414,65 @@ function_arg (CUMULATIVE_ARGS *cum, enum
if (USE_FP_FOR_ARG_P (cum, mode, type))
{
- if (! type
- || ((cum->nargs_prototype > 0)
- /* IBM AIX extended its linkage convention definition always
- to require FP args after register save area hole on the
- stack. */
- && (DEFAULT_ABI != ABI_AIX
- || ! TARGET_XL_CALL
- || (align_words < GP_ARG_NUM_REG))))
- return gen_rtx_REG (mode, cum->fregno);
+ rtx fpr[2];
+ rtx *r;
+ bool needs_psave;
+ enum machine_mode fmode = mode;
+ int n;
+ unsigned long n_fpreg = (GET_MODE_SIZE (mode) + 7) >> 3;
+
+ if (cum->fregno + n_fpreg > FP_ARG_MAX_REG + 1)
+ {
+ /* Long double split over regs and memory. */
+ if (fmode == TFmode)
+ fmode = DFmode;
+
+ /* Currently, we only ever need one reg here because complex
+ doubles are split. */
+ if (cum->fregno != FP_ARG_MAX_REG - 1)
+ abort ();
+ }
+ fpr[1] = gen_rtx_REG (fmode, cum->fregno);
+
+ /* Do we also need to pass this arg in the parameter save
+ area? */
+ needs_psave = (type
+ && (cum->nargs_prototype <= 0
+ || (DEFAULT_ABI == ABI_AIX
+ && TARGET_XL_CALL
+ && align_words >= GP_ARG_NUM_REG)));
+
+ if (!needs_psave && mode == fmode)
+ return fpr[1];
+
+ /* Describe where this piece goes. */
+ r = fpr + 1;
+ *r = gen_rtx_EXPR_LIST (VOIDmode, *r, const0_rtx);
+ n = 1;
+
+ if (needs_psave)
+ {
+ /* Now describe the part that goes in gprs or the stack.
+ This piece must come first, before the fprs. */
+ rtx reg = NULL_RTX;
+ if (align_words < GP_ARG_NUM_REG)
+ {
+ unsigned long n_words = rs6000_arg_size (mode, type);
+ enum machine_mode rmode = mode;
+
+ if (align_words + n_words > GP_ARG_NUM_REG)
+ /* If this is partially on the stack, then we only
+ include the portion actually in registers here.
+ We know this can only be one register because
+ complex doubles are splt. */
+ rmode = Pmode;
+ reg = gen_rtx_REG (rmode, GP_ARG_MIN_REG + align_words);
+ }
+ *--r = gen_rtx_EXPR_LIST (VOIDmode, reg, const0_rtx);
+ ++n;
+ }
- return gen_rtx_PARALLEL (mode,
- gen_rtvec (2,
- gen_rtx_EXPR_LIST (VOIDmode,
- ((align_words >= GP_ARG_NUM_REG)
- ? NULL_RTX
- : (align_words
- + RS6000_ARG_SIZE (mode, type)
- > GP_ARG_NUM_REG
- /* If this is partially on the stack, then
- we only include the portion actually
- in registers here. */
- ? gen_rtx_REG (Pmode,
- GP_ARG_MIN_REG + align_words)
- : gen_rtx_REG (mode,
- GP_ARG_MIN_REG + align_words))),
- const0_rtx),
- gen_rtx_EXPR_LIST (VOIDmode,
- gen_rtx_REG (mode, cum->fregno),
- const0_rtx)));
+ return gen_rtx_PARALLEL (mode, gen_rtvec_v (n, r));
}
else if (align_words < GP_ARG_NUM_REG)
return gen_rtx_REG (mode, GP_ARG_MIN_REG + align_words);
@@ -4441,27 +4489,31 @@ int
function_arg_partial_nregs (CUMULATIVE_ARGS *cum, enum machine_mode mode,
tree type, int named)
{
+ int ret = 0;
+
if (DEFAULT_ABI == ABI_V4)
return 0;
- if (USE_FP_FOR_ARG_P (cum, mode, type)
- || USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named))
+ if (USE_ALTIVEC_FOR_ARG_P (cum, mode, type, named)
+ && cum->nargs_prototype >= 0)
+ return 0;
+
+ if (USE_FP_FOR_ARG_P (cum, mode, type))
{
- if (cum->nargs_prototype >= 0)
+ if (cum->fregno + ((GET_MODE_SIZE (mode) + 7) >> 3) > FP_ARG_MAX_REG + 1)
+ ret = FP_ARG_MAX_REG - cum->fregno;
+ else if (cum->nargs_prototype >= 0)
return 0;
}
if (cum->words < GP_ARG_NUM_REG
- && GP_ARG_NUM_REG < (cum->words + RS6000_ARG_SIZE (mode, type)))
- {
- int ret = GP_ARG_NUM_REG - cum->words;
- if (ret && TARGET_DEBUG_ARG)
- fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
+ && GP_ARG_NUM_REG < cum->words + rs6000_arg_size (mode, type))
+ ret = GP_ARG_NUM_REG - cum->words;
- return ret;
- }
+ if (ret != 0 && TARGET_DEBUG_ARG)
+ fprintf (stderr, "function_arg_partial_nregs: %d\n", ret);
- return 0;
+ return ret;
}
/* A C expression that indicates when an argument must be passed by
@@ -4567,7 +4619,7 @@ setup_incoming_varargs (CUMULATIVE_ARGS
cfun->machine->sysv_varargs_p = 0;
if (MUST_PASS_IN_STACK (mode, type))
- first_reg_offset += RS6000_ARG_SIZE (TYPE_MODE (type), type);
+ first_reg_offset += rs6000_arg_size (TYPE_MODE (type), type);
}
set = get_varargs_alias_set ();
@@ -4757,8 +4809,63 @@ rs6000_va_arg (tree valist, tree type)
return expand_expr (t, NULL_RTX, VOIDmode, EXPAND_NORMAL);
}
- else
- return std_expand_builtin_va_arg (valist, type);
+ if (SPLIT_COMPLEX_ARGS
+ && TREE_CODE (type) == COMPLEX_TYPE)
+ {
+ tree elem_type = TREE_TYPE (type);
+ enum machine_mode elem_mode = TYPE_MODE (elem_type);
+ int elem_size = GET_MODE_SIZE (elem_mode);
+
+ if (elem_size < UNITS_PER_WORD)
+ {
+#if 0
+ rtx real_part, imag_part, value, slot;
+
+ real_part = rs6000_va_arg (valist, elem_type);
+ imag_part = rs6000_va_arg (valist, elem_type);
+
+ /* We're not returning the value here, but the address.
+ real_part and imag_part are not contiguous, so we must
+ copy to local storage. */
+
+ real_part = gen_rtx_MEM (elem_mode, real_part);
+ imag_part = gen_rtx_MEM (elem_mode, imag_part);
+
+ /* Fails due to loads moving before stores to slot. */
+ value = gen_rtx_CONCAT (TYPE_MODE (type), real_part, imag_part);
+ slot = assign_temp (type, 0, 1, 0);
+ emit_move_insn (slot, value);
+
+ return XEXP (slot, 0);
+#else
+ rtx real_part, imag_part, dest_real, rr;
+
+ real_part = rs6000_va_arg (valist, elem_type);
+ imag_part = rs6000_va_arg (valist, elem_type);
+
+ /* We're not returning the value here, but the address.
+ real_part and imag_part are not contiguous, and we know
+ there is space available to pack real_part next to
+ imag_part. float _Complex is not promoted to
+ double _Complex by the default promotion rules that
+ promote float to double. */
+ if (2 * elem_size > UNITS_PER_WORD)
+ abort ();
+
+ real_part = gen_rtx_MEM (elem_mode, real_part);
+ imag_part = gen_rtx_MEM (elem_mode, imag_part);
+
+ dest_real = adjust_address (imag_part, elem_mode, -elem_size);
+ rr = gen_reg_rtx (elem_mode);
+ emit_move_insn (rr, real_part);
+ emit_move_insn (dest_real, rr);
+
+ return XEXP (dest_real, 0);
+#endif
+ }
+ }
+
+ return std_expand_builtin_va_arg (valist, type);
}
f_gpr = TYPE_FIELDS (TREE_TYPE (va_list_type_node));
Index: gcc/config/rs6000/rs6000.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/rs6000/rs6000.h,v
retrieving revision 1.311
diff -u -p -r1.311 rs6000.h
--- gcc/config/rs6000/rs6000.h 6 Feb 2004 06:18:20 -0000 1.311
+++ gcc/config/rs6000/rs6000.h 7 Feb 2004 04:09:47 -0000
@@ -1056,7 +1056,8 @@ extern enum rs6000_nop_insertion rs6000_
(INT_REGNO_P (REGNO) ? \
INT_REGNO_P (REGNO + HARD_REGNO_NREGS (REGNO, MODE) - 1) \
: FP_REGNO_P (REGNO) ? \
- (GET_MODE_CLASS (MODE) == MODE_FLOAT \
+ ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
+ && FP_REGNO_P (REGNO + HARD_REGNO_NREGS (REGNO, MODE) - 1)) \
|| (GET_MODE_CLASS (MODE) == MODE_INT \
&& GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \
: ALTIVEC_REGNO_P (REGNO) ? ALTIVEC_VECTOR_MODE (MODE) \
@@ -1752,16 +1753,6 @@ typedef struct rs6000_args
int call_cookie; /* Do special things for this call */
int sysv_gregno; /* next available GP register */
} CUMULATIVE_ARGS;
-
-/* Define intermediate macro to compute the size (in registers) of an argument
- for the RS/6000. */
-
-#define UNITS_PER_ARG (TARGET_32BIT ? 4 : 8)
-
-#define RS6000_ARG_SIZE(MODE, TYPE) \
-((MODE) != BLKmode \
- ? (GET_MODE_SIZE (MODE) + (UNITS_PER_ARG - 1)) / UNITS_PER_ARG \
- : (int_size_in_bytes (TYPE) + (UNITS_PER_ARG - 1)) / UNITS_PER_ARG)
/* Initialize a variable CUM of type CUMULATIVE_ARGS
for a call to a function whose data type is FNTYPE.
--
Alan Modra
IBM OzLabs - Linux Technology Centre