This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: Fix PR target/10904 and PR target/13058
- From: Richard Henderson <rth at redhat dot com>
- To: Eric Botcazou <ebotcazou at libertysurf dot fr>
- Cc: gcc-patches at gcc dot gnu dot org, Andrew Over <andrew dot over at cs dot anu dot edu dot au>
- Date: Tue, 27 Jan 2004 11:06:54 -0800
- Subject: Re: Fix PR target/10904 and PR target/13058
- References: <200401271419.15157.ebotcazou@libertysurf.fr>
On Tue, Jan 27, 2004 at 02:32:43PM +0100, Eric Botcazou wrote:
> +/* Defines invalid mode changes. Borrowed from pa64-regs.h.
> +
> + SImode loads to floating-point registers are not zero-extended.
> + The definition for LOAD_EXTEND_OP specifies that integer loads
> + narrower than BITS_PER_WORD will be zero-extended. As a result,
> + we inhibit changes from SImode unless they are to a mode that is
> + identical in size. */
> +
> +#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
> + (TARGET_ARCH64 \
> + && (FROM) == SImode \
> + && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
> + ? reg_classes_intersect_p (CLASS, FP_REGS) : 0)
You shouldn't copy the PA block comment, you should describe
what SPARC needs, and what you've implemented. Namely, you're
preventing any subregging of SImode.
I wonder if the exact test you want is GMS(F) < GMS(T), which
would test for *paradoxical* subregging.
r~