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Re: Fix PR target/10904 and PR target/13058


On Tue, Jan 27, 2004 at 02:32:43PM +0100, Eric Botcazou wrote:
> +/* Defines invalid mode changes.  Borrowed from pa64-regs.h.
> +
> +   SImode loads to floating-point registers are not zero-extended.
> +   The definition for LOAD_EXTEND_OP specifies that integer loads
> +   narrower than BITS_PER_WORD will be zero-extended.  As a result,
> +   we inhibit changes from SImode unless they are to a mode that is
> +   identical in size.  */
> +
> +#define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS)		\
> +  (TARGET_ARCH64						\
> +   && (FROM) == SImode						\
> +   && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO)		\
> +   ? reg_classes_intersect_p (CLASS, FP_REGS) : 0)

You shouldn't copy the PA block comment, you should describe
what SPARC needs, and what you've implemented.  Namely, you're
preventing any subregging of SImode.

I wonder if the exact test you want is GMS(F) < GMS(T), which
would test for *paradoxical* subregging.


r~


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