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ARM VFP instructions


The attached patch implements code generation for the ARM VFP11 floating point 
corocessor.

It currently uses the standard calling conventions. Implementation of the 
enhanced VFP calling convention will come later.

Tested with cross-compiler/simulator on arm-none-elf.

I'm aware of the following unaddressed issues:
- It sometimes uses IP as a scratch register in function epilogues.  Is this 
safe?
- The exact stack frame layout is implementation dependent. The code should be 
work with any implementation. However stack frame debug info (and unwind 
info?) might be a bit off.
- The rtx_costs have not been updated.
- The scheduler description is fairly basic. It does not correctly model 
fmstat, input register interlocks (caused by exception requirements), or 
integer core resources for VFP<->ARM register copies.
- VFPv1 (w/o fmrrd) and VFPv1xD (w/o double precision) variants are not 
supported.

Ok?

Paul

2003-01-26  Paul Brook  <paul@codesourcery.com>

	* config/arm/aof.h (REGISTER_NAMES): Add vfp reg names
	(ADDITIONAL_REGISTER_NAMES): Ditto.
	* aout.h (REGISTER_NAMES): Ditto.
	(ADDITIONAL_REGISTER_NAMES): Ditto.
	* config/arm/arm-protos.h: Update/Add Prototypes.
	* config/arm/arm.c (init_fp_table): Rename from init_fpa_table. Update users.
	Only allow 0.0 for VFP.
	(fp_consts_inited): Rename from fpa_consts_inited.  Update users.
	(values_fp): Rename from values_fpa.  Update Users.
	(arm_const_double_rtx): Rename from const_double_rtx_ok_for_fpa.
	Update users.  Only check valid constants for this hardware.
	(arm_float_rhs_operand): Rename from fpa_rhs_operand.  Update Users.
	Only allow consts for FPA.
	(arm_float_add_operand): Rename from fpa_add_operand.  Update users.
	Only allow consts for FPA.
	(use_return_insn): Check for saved VFP regs.
	(arm_legitimate_address_p): Handle VFP DFmode addressing.
	(arm_legitimize_address): Ditto.
	(arm_general_register_operand): New function.
	(vfp_mem_operand): New function.
	(vfp_compare_operand): New function.
	(vfp_secondary_reload_class): New function.
	(arm_float_compare_operand): New function.
	(vfp_print_multi): New function.
	(vfp_output_fstmx): New function.
	(vfp_emit_fstm): New function.
	(arm_output_epilogue): Output VPF reg restore code.
	(arm_expand_prologue): Output VFP reg save code.
	(arm_print_operand): Add 'P'.
	(arm_hard_regno_mode_ok): Return modes for VFP regs.
	(arm_regno_class): Return classes for VFP regs.
	(arm_compute_initial_elimination_offset): Include space for VFP regs.
	(arm_get_frame_size): Ditto.
	* config/arm/arm.h (FIXED_REGISTERS): Add VFP regs.
	(CALL_USED_REGISTERS): Ditto.
	(CONDITIONAL_REGISTER_USAGE): Enable VFP regs.
	(FIRST_VFP_REGNUM): Define.
	(LAST_VFP_REGNUM): Define.
	(IS_VFP_REGNUM): Define.
	(FIRST_PSEUDO_REGISTER): Include VFP regs.
	(HARD_REGNO_NREGS): Handle VFP regs.
	(REG_ALLOC_ORDER): Add VFP regs.
	(enum reg_class): Add VFP_REGS.
	(REG_CLASS_NAMES): Ditto.
	(REG_CLASS_CONTENTS): Ditto.
	(CANNOT_CHANGE_MODE_CLASS) Handle VFP Regs.
	(REG_CLASS_FROM_LETTER): Add 'w'.
	(EXTRA_CONSTRAINT_ARM): Add 'U'.
	(EXTRA_MEMORY_CONSTRAINT): Define.
	(SECONDARY_OUTPUT_RELOAD_CLASS): Handle VFP regs.
	(SECONDARY_INPUT_RELOAD_CLASS): Ditto.
	(REGISTER_MOVE_COST): Ditto.
	(PREDICATE_CODES): Add arm_general_register_operand,
	arm_float_compare_operand and vfp_compare_operand.
	* config/arm/arm.md (various): Rename as above.
	(divsf3): Enable when TARGET_VFP.
	(divdf3): Ditto.
	(movdfcc): Ditto.
	(sqrtsf2): Ditto.
	(sqrtdf2): Ditto.
	(arm_movdi): Disable when TARGET_VFP.
	(arm_movsi_insn): Ditto.
	(movsi): Only split with general regs.
	(cmpsf): Use arm_float_compare_operand.
	(push_fp_multi): Restrict to TARGET_FPA.
	(vfp.md): Include.
	* config/arm/vfp.md: New file.
	* config/arm/fpa.md (various): Rename as above.
	* doc/md.texi: Document ARM w and U constraints.

Attachment: patch.vfp.gz
Description: GNU Zip compressed data


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