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[committed 3.4/3.5] Fix PA PRs 13324 and 13713


Yesterday, given the analysis presented with PR target/13713, it dawned 
on me what the problem was.  The constraints for the count operand for
the movstr and clrstr patterns needed to be changed to early clobbers
to prevent an input operand from being allocated to the same register
as the count operand.  Doh...

In previous versions, it's not marked as an earlier clobber, but all
the other operands are marked as outputs, so the conflict doesn't
occur.  I missed this when movstrsi got revised to work around a change
to regrename.c.  The problem didn't show up in initial testing and 
only triggered when other changes to the compiler were made.  Sorry
for all the fuss over what was my problem.

Tested on hppa64-hp-hpux11.11, hppa2.0w-hp-hpux11.00 and hppa-unknown-linux-gnu
with no regressions.  Installed to 3.4 and trunk.

Dave
-- 
J. David Anglin                                  dave.anglin@nrc-cnrc.gc.ca
National Research Council of Canada              (613) 990-0752 (FAX: 952-6602)

2004-01-22  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>

	PR target/13713
	PR target/13324
	* pa.md (movstrsi_prereload, movstrsi_postreload, movstrdi_prereload,
	movstrdi_postreload, clrstrsi_prereload, clrstrsi_postreload,
	clrstrdi_prereload, clrstrdi_postreload): Fix constraints.

Index: config/pa/pa.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/pa/pa.md,v
retrieving revision 1.138
diff -u -3 -p -r1.138 pa.md
--- config/pa/pa.md	12 Jan 2004 03:42:09 -0000	1.138
+++ config/pa/pa.md	21 Jan 2004 20:26:50 -0000
@@ -3194,7 +3194,7 @@
 (define_insn "movstrsi_prereload"
   [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
 	(mem:BLK (match_operand:SI 1 "register_operand" "r,r")))
-   (clobber (match_operand:SI 2 "register_operand" "=r,r"))	;loop cnt/tmp
+   (clobber (match_operand:SI 2 "register_operand" "=&r,&r"))	;loop cnt/tmp
    (clobber (match_operand:SI 3 "register_operand" "=&r,&r"))	;item tmp1
    (clobber (match_operand:SI 6 "register_operand" "=&r,&r"))	;item tmp2
    (clobber (match_operand:SI 7 "register_operand" "=&r,&r"))	;item tmp3
@@ -3263,9 +3263,9 @@
 }")
 
 (define_insn "movstrsi_postreload"
-  [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
-	(mem:BLK (match_operand:SI 1 "register_operand" "r,r")))
-   (clobber (match_operand:SI 2 "register_operand" "=r,r"))	;loop cnt/tmp
+  [(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r"))
+	(mem:BLK (match_operand:SI 1 "register_operand" "+r,r")))
+   (clobber (match_operand:SI 2 "register_operand" "=&r,&r"))	;loop cnt/tmp
    (clobber (match_operand:SI 3 "register_operand" "=&r,&r"))	;item tmp1
    (clobber (match_operand:SI 6 "register_operand" "=&r,&r"))	;item tmp2
    (clobber (match_dup 0))
@@ -3360,7 +3360,7 @@
 (define_insn "movstrdi_prereload"
   [(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r"))
 	(mem:BLK (match_operand:DI 1 "register_operand" "r,r")))
-   (clobber (match_operand:DI 2 "register_operand" "=r,r"))	;loop cnt/tmp
+   (clobber (match_operand:DI 2 "register_operand" "=&r,&r"))	;loop cnt/tmp
    (clobber (match_operand:DI 3 "register_operand" "=&r,&r"))	;item tmp1
    (clobber (match_operand:DI 6 "register_operand" "=&r,&r"))	;item tmp2
    (clobber (match_operand:DI 7 "register_operand" "=&r,&r"))	;item tmp3
@@ -3429,9 +3429,9 @@
 }")
 
 (define_insn "movstrdi_postreload"
-  [(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r"))
-	(mem:BLK (match_operand:DI 1 "register_operand" "r,r")))
-   (clobber (match_operand:DI 2 "register_operand" "=r,r"))	;loop cnt/tmp
+  [(set (mem:BLK (match_operand:DI 0 "register_operand" "+r,r"))
+	(mem:BLK (match_operand:DI 1 "register_operand" "+r,r")))
+   (clobber (match_operand:DI 2 "register_operand" "=&r,&r"))	;loop cnt/tmp
    (clobber (match_operand:DI 3 "register_operand" "=&r,&r"))	;item tmp1
    (clobber (match_operand:DI 6 "register_operand" "=&r,&r"))	;item tmp2
    (clobber (match_dup 0))
@@ -3482,7 +3482,7 @@
 (define_insn "clrstrsi_prereload"
   [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
 	(const_int 0))
-   (clobber (match_operand:SI 1 "register_operand" "=r,r"))	;loop cnt/tmp
+   (clobber (match_operand:SI 1 "register_operand" "=&r,&r"))	;loop cnt/tmp
    (clobber (match_operand:SI 4 "register_operand" "=&r,&r"))	;tmp1
    (use (match_operand:SI 2 "arith_operand" "J,1"))	 ;byte count
    (use (match_operand:SI 3 "const_int_operand" "n,n"))] ;alignment
@@ -3530,9 +3530,9 @@
 }")
 
 (define_insn "clrstrsi_postreload"
-  [(set (mem:BLK (match_operand:SI 0 "register_operand" "r,r"))
+  [(set (mem:BLK (match_operand:SI 0 "register_operand" "+r,r"))
 	(const_int 0))
-   (clobber (match_operand:SI 1 "register_operand" "=r,r"))	;loop cnt/tmp
+   (clobber (match_operand:SI 1 "register_operand" "=&r,&r"))	;loop cnt/tmp
    (clobber (match_dup 0))
    (use (match_operand:SI 2 "arith_operand" "J,1"))	 ;byte count
    (use (match_operand:SI 3 "const_int_operand" "n,n"))  ;alignment
@@ -3580,7 +3580,7 @@
 (define_insn "clrstrdi_prereload"
   [(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r"))
 	(const_int 0))
-   (clobber (match_operand:DI 1 "register_operand" "=r,r"))	;loop cnt/tmp
+   (clobber (match_operand:DI 1 "register_operand" "=&r,&r"))	;loop cnt/tmp
    (clobber (match_operand:DI 4 "register_operand" "=&r,&r"))	;item tmp1
    (use (match_operand:DI 2 "arith_operand" "J,1"))	 ;byte count
    (use (match_operand:DI 3 "const_int_operand" "n,n"))] ;alignment
@@ -3628,9 +3628,9 @@
 }")
 
 (define_insn "clrstrdi_postreload"
-  [(set (mem:BLK (match_operand:DI 0 "register_operand" "r,r"))
+  [(set (mem:BLK (match_operand:DI 0 "register_operand" "+r,r"))
 	(const_int 0))
-   (clobber (match_operand:DI 1 "register_operand" "=r,r"))	;loop cnt/tmp
+   (clobber (match_operand:DI 1 "register_operand" "=&r,&r"))	;loop cnt/tmp
    (clobber (match_dup 0))
    (use (match_operand:DI 2 "arith_operand" "J,1"))	 ;byte count
    (use (match_operand:DI 3 "const_int_operand" "n,n"))  ;alignment


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