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Re: x86/MMX/SSE shift by immediate

On Jan 13, 2004, at 11:15 PM, Eric Botcazou wrote:

O.K., here's a patch that defeats the "cmove" instruction.  I'm not
thrilled by this; I fear a future GCC could outsmart it.

Obviously. I think we need a more robust fix:
- either -msse2 implies -march=i686 and all the affected testcases must be
restricted to i686,

Howabout I split the testcase into three: -mmmx -march=pentium2 (should this be penitum-mmx ?) -msse -march=pentium3 -msse2 -march=pentium4

(Anybody who understands this stuff is invited to chime in and point out my mistakes. Please.)

The existing testcase (i386-sse-6.c) already senses what class CPU it's running on (MMX/SSE/SSE2) and skips unsupported tests. After the split, all three testcases can use the same CPUID glop (testsuite/gcc.dg/i386-cpuid.h) to figure out at runtime if they can run or not.

Does this look plausible (IANA x86 expert ;-) ?

{ target pentium-mmx-*-* pentium2-*-* winchip*-*-* c3*-*-* athlon*-*-* k[68]*-*-* x86_64-*-* } for MMX
{ target pentium3-*-* k[68]*-*-* x86_64-*-* } for SSE
{ target pentium4-*-* k8*-*-* x86_64-*-* } for SSE2

- or it doesn't and we have a bug. Then it would have to be fixed or the
testcase properly XFAILed.

Whatever. The existing testcase did work correctly on a pentium4 and pentium3 hosts when I committed it.

stuart hastings
Apple Computer

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