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Re: [3.3 PATCH] Fix PR optimization/13472

> Ug.  I have no idea how to fix this.

The problem seems to be very rare (although it shows up in the last 2 PRs I 
looked at on the 3.3 branch :-) and even further mitigated on mainline by 
the store motion pass, so...

> It seems likely that your patch will be the least risky that
> we'll be able to find.  I would like more commentary added
> for that patch though.

I added a big comment to the patch.

Eric Botcazou
Index: reload1.c
RCS file: /cvs/gcc/gcc/gcc/reload1.c,v
retrieving revision 1.366.2.7
diff -u -p -r1.366.2.7 reload1.c
--- reload1.c	1 Dec 2003 08:18:38 -0000	1.366.2.7
+++ reload1.c	14 Jan 2004 07:42:50 -0000
@@ -789,8 +789,18 @@ reload (first, global)
 		     that is not a legitimate memory operand.  As later
 		     stages of reload assume that all addresses found
 		     in the reg_equiv_* arrays were originally legitimate,
-		     we ignore such REG_EQUIV notes.  */
-		  if (memory_operand (x, VOIDmode))
+		     we ignore such REG_EQUIV notes.
+		     It also can happen that a REG_EQUIV note contains a MEM
+		     that carries the /u flag, for example when GCSE turns
+		     the load of a constant into a move from a pseudo that
+		     already contains the constant and attaches a REG_EQUAL
+		     note to the insn, which is later promoted to REQ_EQUIV
+		     by local-alloc.  If the destination pseudo happens not
+		     to be assigned to a hard reg, it will be replaced by
+		     the MEM as the destination of the move, thus generating
+		     a store to a possibly read-only memory location.  */
+		  if (memory_operand (x, VOIDmode) && ! RTX_UNCHANGING_P (x))
 		      /* Always unshare the equivalence, so we can
 			 substitute into this insn without touching the

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