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Re: [wwwdocs] more updates to gcc-3.4/changes.html


> On Tue, 6 Jan 2004, Jan Hubicka wrote:
> > more updates for changes.html.  Hope with fewer grammar errors this time
> > :)
> 
> Thanks!
> 
> Concerning grammar, most issues I found were missing "the"s and incorrect
> third person forms of verbs.  I believe this is due to general differences
> between English and German on the one hand, and Slavic languages on the
> other.
> 
> But I'm disgressing... ;-)  The patch is fine with a few changes pointed
> out below; just post the final version as you committed it to this list.
Thanks,
this is the version I am about to commit.
I also moved the note about math functions into C/C++/Objective C
section as it is not generic to the other languages.

Index: changes.html
===================================================================
RCS file: /cvs/gcc/wwwdocs/htdocs/gcc-3.4/changes.html,v
retrieving revision 1.83
diff -c -3 -p -r1.83 changes.html
*** changes.html	5 Jan 2004 22:23:57 -0000	1.83
--- changes.html	7 Jan 2004 15:06:11 -0000
***************
*** 76,82 ****
  	  behavior.</li>
      </ul>
      As a temporary workaround, <code>-fno-unit-at-a-time</code> can be used,
!     but this scheme may not be supported by future relases of GCC.
      </li>
    </ul>
  
--- 76,82 ----
  	  behavior.</li>
      </ul>
      As a temporary workaround, <code>-fno-unit-at-a-time</code> can be used,
!     but this scheme may not be supported by future releases of GCC.
      </li>
    </ul>
  
***************
*** 147,153 ****
  	<code>-fold-unroll-loops</code> and may produce better code in some
  	cases, especially when the webizer optimization pass is not
  	run.</p></li>
! 
    </ul>
  
    
--- 147,164 ----
  	<code>-fold-unroll-loops</code> and may produce better code in some
  	cases, especially when the webizer optimization pass is not
  	run.</p></li>
!     <li>A new web construction pass enabled via <code>-fweb</code> (and implied
!         by <code>-O3</code>) improves the quality of register allocation, CSE,
! 	first scheduling pass and some other optimization passes by avoiding
! 	re-use of pseudo registers with non-overlapping live ranges.  The pass
! 	almost always improves code quality but does make debugging difficult
! 	and thus is not enabled by default by <code>-O2</code>
! 	<p>The pass is especially effective as cleanup after code duplication
! 	passes, such as the loop unroller or the tracer.</p></li>
!     <li>Experimental implementations of superblock or trace scheduling in the
! 	second scheduling pass can be enabled via
! 	<code>-fsched2-use-superblocks</code> and
! 	<code>-fsched2-use-traces</code>, respectively.</li>
    </ul>
  
    
***************
*** 229,234 ****
--- 240,247 ----
  	word, and parity have been added.</li>
      <li>The <code>-fwritable-strings</code> option has been deprecated
          and will be removed.</li>
+     <li>Many C math library functions are now recognized as built-ins and
+ 	optimized.</li>
    </ul>
  
  <h3>C++</h3>
***************
*** 495,512 ****
      <li>A lot of small performance improvements.</li>
    </ul>
  
! <h4>IA-32</h4>
    <ul>
!     <li>Tuning for K8 core is available via <code>-march=k8</code> and <code>-mcpu=k8</code></li>
      <li>Scalar SSE code generation carefully avoids reformatting penalties,
          hidden dependencies and minimizes the number of uops generated on
          both Intel and AMD CPUs.</li>
      <li>Conditional jump elimination is now more aggressive on modern CPUs.</li>
!     <li>The Athlon and K8 ports have been converted to use the DFA
          processor pipeline description.</li>
      <li>Optimization of indirect tail calls is now possible in a similar
        fashion as direct sibcall optimization.</li>
      <li>Further small performance improvements.</li>
    </ul>
  
  <h4>M32R</h4>
--- 508,534 ----
      <li>A lot of small performance improvements.</li>
    </ul>
  
! <h4>IA-32/AMD64 (x86-64)</h4>
    <ul>
!     <li>Tuning for K8 (AMD Opteron/Athlon64) core is available via
!         <code>-march=k8</code> and <code>-mcpu=k8</code>.</li>
      <li>Scalar SSE code generation carefully avoids reformatting penalties,
          hidden dependencies and minimizes the number of uops generated on
          both Intel and AMD CPUs.</li>
+     <li>Vector MMX and SSE operands are now passed in registers to improve
+ 	performance and match the argument passing convention used by the Intel 
+ 	C++ Compiler.  As a result it is not possible to call functions
+ 	accepting vector arguments compiled by older GCC version.<li>
      <li>Conditional jump elimination is now more aggressive on modern CPUs.</li>
!     <li>The Athlon ports has been converted to use the DFA
          processor pipeline description.</li>
      <li>Optimization of indirect tail calls is now possible in a similar
        fashion as direct sibcall optimization.</li>
      <li>Further small performance improvements.</li>
+     <li><code>-m128bit-long-double</code> is now less buggy.</li>
+     <li><code>__float128</code> support in 64-bit compilation.</li>
+     <li>Support for data structures exceeding 2GB in 64-bit mode.</li>
+     <li><code>-mcpu</code> has been renamed to <code>-mtune</code>.</li>
    </ul>
  
  <h4>M32R</h4>


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