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Re: [wwwdocs] more updates to gcc-3.4/changes.html
- From: Gerald Pfeifer <gp at suse dot de>
- To: Jan Hubicka <jh at suse dot cz>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: Tue, 6 Jan 2004 21:15:42 +0100 (CET)
- Subject: Re: [wwwdocs] more updates to gcc-3.4/changes.html
- References: <20040106175229.GG30323@kam.mff.cuni.cz>
On Tue, 6 Jan 2004, Jan Hubicka wrote:
> more updates for changes.html. Hope with fewer grammar errors this time
Concerning grammar, most issues I found were missing "the"s and incorrect
third person forms of verbs. I believe this is due to general differences
between English and German on the one hand, and Slavic languages on the
But I'm disgressing... ;-) The patch is fine with a few changes pointed
out below; just post the final version as you committed it to this list.
> ! <li>Web construction pass enabled via <code>-fweb</code> (and implied by
> ! <code>-O3</code>) improve quality of register allocation, CSE
> ! and some other optimization passes by avoid re-use of pseudo registers
> ! with non-overlapping live ranges.
As this is a bit longer than just a simple fact, I suggest to make this a
full sentence; something like "A new web constructions pass...improves..."
"the quality of register allocation" or just "register allocation quality"
"by avoid" -> "by avoiding" or just ", avoiding..."
> The pass almost always improve
> ! code quality but does make debugging difficult and thus it is not
> ! enabled by default by <code>-O2</code>
Omit "it" and add a full stop at the end.
> ! <p>The pass is especially effective as cleanup after code duplication
> ! passes, such as loop unroller or the tracer.</p></li>
"the loop unroller"
> ! <li>Experimental implementation of superblock or trace scheduling in 2nd
> ! scheduling pass enabled via <code>-fsched2-use-superblocks</code>
"Experimental implementations of...in the second scheduling pass can be
enabled...", and a comma before "respectively".
> ! <li>Many C math library functions are now recognized as built-ins and
> ! optimized</li>
> + <li>Vector MMX and SSE operands are now passed in registers to improve
> + performance and match argument passing convention used by Intel
> ! <li>The Athlon port have been converted to use the DFA
"ports" or "has"
> + <li><code>-mcpu</code> has been renamed to <code>-mtune</code>