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[patch] config/mips/*: Fix comment formatting.


Hi,

Attached is a patch to fix comment formatting.  Committed as obvious.

Kazu Hirata

2004-01-03  Kazu Hirata  <kazu@cs.umass.edu>

	* config/mips/linux.h: Fix comment formatting.
	* config/mips/mips.c: Likewise.
	* config/mips/mips.h: Likewise.
	* config/mips/mips.md: Likewise.
	* config/mips/netbsd.h: Likewise.
	* config/mips/windiss.h: Likewise.

Index: linux.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/linux.h,v
retrieving revision 1.73
diff -u -r1.73 linux.h
--- linux.h	29 Nov 2003 03:08:11 -0000	1.73
+++ linux.h	3 Jan 2004 18:26:53 -0000
@@ -198,7 +198,7 @@
 
 /* The third parameter to the signal handler points to something with
  * this structure defined in asm/ucontext.h, but the name clashes with
- * struct ucontext from sys/ucontext.h so this private copy is used. */
+ * struct ucontext from sys/ucontext.h so this private copy is used.  */
 typedef struct _sig_ucontext {
     unsigned long         uc_flags;
     struct _sig_ucontext  *uc_link;
Index: mips.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.c,v
retrieving revision 1.355
diff -u -r1.355 mips.c
--- mips.c	24 Dec 2003 03:59:59 -0000	1.355
+++ mips.c	3 Jan 2004 18:26:58 -0000
@@ -2352,7 +2352,7 @@
             *total = COSTS_N_INSNS (36);
           return true;
         }
-      /* FALLTHRU */
+      /* Fall through.  */
 
     case UDIV:
     case UMOD:
@@ -2822,7 +2822,7 @@
 	    return 0;
 	}
 
-      /* allocate a pseudo to calculate the value in.  */
+      /* Allocate a pseudo to calculate the value in.  */
       result = gen_reg_rtx (mode);
     }
 
@@ -3854,7 +3854,7 @@
       if (fp_saved > 0)
 	{
 	  /* We can't use move_block_from_reg, because it will use
-	     the wrong mode. */
+	     the wrong mode.  */
 	  enum machine_mode mode;
 	  int off, i;
 
@@ -4643,7 +4643,7 @@
 
   if (TARGET_SGI_O32_AS)
     {
-      /* They don't recognize `.[248]byte'. */
+      /* They don't recognize `.[248]byte'.  */
       targetm.asm_out.unaligned_op.hi = "\t.align 0\n\t.half\t";
       targetm.asm_out.unaligned_op.si = "\t.align 0\n\t.word\t";
       /* The IRIX 6 O32 assembler gives an error for `align 0; .dword',
@@ -5065,7 +5065,7 @@
       for (regno = FP_REG_FIRST + 20; regno < FP_REG_FIRST + 24; regno++)
 	call_really_used_regs[regno] = call_used_regs[regno] = 1;
     }
-  /* odd registers from fp21 to fp31 are now caller saved.  */
+  /* Odd registers from fp21 to fp31 are now caller saved.  */
   if (mips_abi == ABI_N32)
     {
       int regno;
@@ -5505,7 +5505,7 @@
       fputc (')', file);
 }
 
-/* Output address operand X to FILE.   */
+/* Output address operand X to FILE.  */
 
 void
 print_operand_address (FILE *file, rtx x)
@@ -7415,7 +7415,7 @@
     {
       if (GET_CODE (x) == MEM)
 	{
-	  /* In this case we can use lwc1, swc1, ldc1 or sdc1. */
+	  /* In this case we can use lwc1, swc1, ldc1 or sdc1.  */
 	  return NO_REGS;
 	}
       else if (CONSTANT_P (x) && GET_MODE_CLASS (mode) == MODE_FLOAT)
@@ -8807,7 +8807,7 @@
 	  else
 	    return 6;
 	}
-    }  /* from == HI_REG, etc. */
+    }  /* from == HI_REG, etc.  */
   else if (from == ST_REGS && GR_REG_CLASS_P (to))
     return 4;
   else if (COP_REG_CLASS_P (from))
@@ -8815,7 +8815,7 @@
       return 5;
     }  /* COP_REG_CLASS_P (from) */
 
-  /* fallthru */
+  /* Fall through.  */
 
   return 12;
 }
Index: mips.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.h,v
retrieving revision 1.306
diff -u -r1.306 mips.h
--- mips.h	5 Dec 2003 10:38:57 -0000	1.306
+++ mips.h	3 Jan 2004 18:27:00 -0000
@@ -169,7 +169,7 @@
 #define MASK_UNINIT_CONST_IN_RODATA \
 			   0x00800000	/* Store uninitialized
 					   consts in rodata */
-#define MASK_FIX_SB1       0x01000000   /* Work around SB-1 errata. */
+#define MASK_FIX_SB1       0x01000000   /* Work around SB-1 errata.  */
 
 					/* Debug switches, not documented */
 #define MASK_DEBUG	0		/* unused */
@@ -2661,7 +2661,7 @@
 
 /* Specify the machine mode that this machine uses
    for the index in the tablejump instruction.
-   ??? Using HImode in mips16 mode can cause overflow. */
+   ??? Using HImode in mips16 mode can cause overflow.  */
 #define CASE_VECTOR_MODE \
   (TARGET_MIPS16 ? HImode : ptr_mode)
 
@@ -2735,7 +2735,7 @@
    that the constraints of the insn are met.  Setting a cost of
    other than 2 will allow reload to verify that the constraints are
    met.  You should do this if the `movM' pattern's constraints do
-   not allow such copying. */
+   not allow such copying.  */
 
 #define REGISTER_MOVE_COST(MODE, FROM, TO)				\
   mips_register_move_cost (MODE, FROM, TO)
Index: mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.210
diff -u -r1.210 mips.md
--- mips.md	5 Dec 2003 10:38:58 -0000	1.210
+++ mips.md	3 Jan 2004 18:27:02 -0000
@@ -3841,7 +3841,7 @@
 
   real_2expN (&offset, 31);
 
-  if (reg1)			/* turn off complaints about unreached code */
+  if (reg1)			/* Turn off complaints about unreached code.  */
     {
       emit_move_insn (reg1, CONST_DOUBLE_FROM_REAL_VALUE (offset, DFmode));
       do_pending_stack_adjust ();
@@ -3864,7 +3864,7 @@
 
       emit_label (label2);
 
-      /* allow REG_NOTES to be set on last insn (labels don't have enough
+      /* Allow REG_NOTES to be set on last insn (labels don't have enough
 	 fields, and can't be used for REG_NOTES anyway).  */
       emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
       DONE;
@@ -3907,7 +3907,7 @@
 
   emit_label (label2);
 
-  /* allow REG_NOTES to be set on last insn (labels don't have enough
+  /* Allow REG_NOTES to be set on last insn (labels don't have enough
      fields, and can't be used for REG_NOTES anyway).  */
   emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
   DONE;
@@ -3949,7 +3949,7 @@
 
   emit_label (label2);
 
-  /* allow REG_NOTES to be set on last insn (labels don't have enough
+  /* Allow REG_NOTES to be set on last insn (labels don't have enough
      fields, and can't be used for REG_NOTES anyway).  */
   emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
   DONE;
@@ -3991,7 +3991,7 @@
 
   emit_label (label2);
 
-  /* allow REG_NOTES to be set on last insn (labels don't have enough
+  /* Allow REG_NOTES to be set on last insn (labels don't have enough
      fields, and can't be used for REG_NOTES anyway).  */
   emit_insn (gen_rtx_USE (VOIDmode, stack_pointer_rtx));
   DONE;
@@ -6868,7 +6868,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -6881,7 +6881,7 @@
   if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
     operands[2] = force_reg (SImode, operands[2]);
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 
@@ -6985,7 +6985,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -6998,7 +6998,7 @@
   if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) < 0)
     operands[2] = force_reg (SImode, operands[2]);
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "sne_si_zero"
@@ -7081,7 +7081,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -7094,7 +7094,7 @@
   if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) != 0)
     operands[2] = force_reg (SImode, operands[2]);
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "sgt_si"
@@ -7142,7 +7142,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -7152,7 +7152,7 @@
       DONE;
     }
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "sge_si"
@@ -7211,7 +7211,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -7221,7 +7221,7 @@
       DONE;
     }
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "slt_si"
@@ -7279,7 +7279,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -7292,7 +7292,7 @@
   if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 32767)
     operands[2] = force_reg (SImode, operands[2]);
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "sle_si_const"
@@ -7405,7 +7405,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -7418,7 +7418,7 @@
   if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) != 0)
     operands[2] = force_reg (SImode, operands[2]);
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "sgtu_si"
@@ -7466,7 +7466,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -7476,7 +7476,7 @@
       DONE;
     }
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "sgeu_si"
@@ -7535,7 +7535,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -7545,7 +7545,7 @@
       DONE;
     }
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "sltu_si"
@@ -7603,7 +7603,7 @@
   if (branch_type != CMP_SI && (!TARGET_64BIT || branch_type != CMP_DI))
     FAIL;
 
-  /* set up operands from compare.  */
+  /* Set up operands from compare.  */
   operands[1] = branch_cmp[0];
   operands[2] = branch_cmp[1];
 
@@ -7616,7 +7616,7 @@
   if (GET_CODE (operands[2]) == CONST_INT && INTVAL (operands[2]) >= 32767)
     operands[2] = force_reg (SImode, operands[2]);
 
-  /* fall through and generate default code */
+  /* Fall through and generate default code.  */
 })
 
 (define_insn "sleu_si_const"
Index: netbsd.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/netbsd.h,v
retrieving revision 1.31
diff -u -r1.31 netbsd.h
--- netbsd.h	27 Sep 2003 04:48:26 -0000	1.31
+++ netbsd.h	3 Jan 2004 18:27:02 -0000
@@ -20,7 +20,7 @@
 Boston, MA 02111-1307, USA.  */
 
 
-/* Define default target values. */
+/* Define default target values.  */
 
 #undef MACHINE_TYPE
 #if TARGET_ENDIAN_DEFAULT != 0
Index: windiss.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/windiss.h,v
retrieving revision 1.1
diff -u -r1.1 windiss.h
--- windiss.h	23 Oct 2003 05:16:55 -0000	1.1
+++ windiss.h	3 Jan 2004 18:27:02 -0000
@@ -89,7 +89,7 @@
 #undef ENDFILE_SPEC
 #define ENDFILE_SPEC "crtend.o%s"
 
-/* We have no shared libraries.  These two shouldn't be necessary. */
+/* We have no shared libraries.  These two shouldn't be necessary.  */
 #undef LINK_SHLIB_SPEC
 #define LINK_SHLIB_SPEC ""
 #undef LINK_EH_SPEC


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