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[applied MIPS patch] fix divsf3 for -mfix-sb1


the change that fixed MIPS recip generation broke -mfix-sb1 slightly.
the simple test case:

        float x(float y, float z) { return y / z; }

compiled with -O -mfix-sb1 shows the ICE.

patch causes no change in mipsisa64-elf gcc/g++ test results, when
tested against the simulator (-mips32 and -mips64 multilibs), and also
hand-verified to fix the problem.

committed as obvious.


chris
--
2003-10-05  Chris Demetriou  <cgd@broadcom.com>

	* config/mips/mips.md (*divsf3): Move description of
	SB-1 F2 erratum from here to...
	(divsf3): Here.  Disable if TARGET_FIX_SB1 is set and
	flag_unsafe_math_optimizations is not.

Index: config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.198
diff -u -p -r1.198 mips.md
--- config/mips/mips.md	3 Oct 2003 21:13:13 -0000	1.198
+++ config/mips/mips.md	5 Oct 2003 23:52:51 -0000
@@ -2407,11 +2407,19 @@
                       (const_int 4)))])
 
 
+;; This pattern works around the early SB-1 rev2 core "F2" erratum:
+;;
+;; In certain cases, div.s and div.ps may have a rounding error
+;; and/or wrong inexact flag.
+;;
+;; Therefore, we only allow div.s if not working around SB-1 rev2
+;; errata, or if working around those errata and a slight loss of
+;; precision is OK (i.e., flag_unsafe_math_optimizations is set).
 (define_expand "divsf3"
   [(set (match_operand:SF 0 "register_operand" "")
 	(div:SF (match_operand:SF 1 "reg_or_const_float_1_operand" "")
 		(match_operand:SF 2 "register_operand" "")))]
-  "TARGET_HARD_FLOAT"
+  "TARGET_HARD_FLOAT && (!TARGET_FIX_SB1 || flag_unsafe_math_optimizations)"
 {
   if (const_float_1_operand (operands[1], SFmode))
     if (!(ISA_HAS_FP4 && flag_unsafe_math_optimizations))
@@ -2421,14 +2429,8 @@
 ;; This pattern works around the early SB-1 rev2 core "F1" erratum (see
 ;; "divdf3" comment for details).
 ;;
-;; This pattern works around the early SB-1 rev2 core "F2" erratum:
-;;
-;; In certain cases, div.s and div.ps may have a rounding error
-;; and/or wrong inexact flag.
-;;
-;; Therefore, we only allow div.s if not working around SB-1 rev2
-;; errata, or if working around those errata and a slight loss of
-;; precision is OK (i.e., flag_unsafe_math_optimizations is set).
+;; This pattern works around the early SB-1 rev2 core "F2" erratum (see
+;; "divsf3" comment for details).
 (define_insn "*divsf3"
   [(set (match_operand:SF 0 "register_operand" "=f")
 	(div:SF (match_operand:SF 1 "register_operand" "f")


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