[patch] s390 support for tpf os

[Eric Christopher <echristo at redhat dot com>]

For some reason this didn't appear to make it. I'm resending...

It's a pretty simple patch that allows a few things on the port.

1) Hooks into the tpf profiler to do something magic. :)
2) Allows using an SImode attribute for pointers so that compatibility
can exist between 31 and 64-bit code libraries. (lots of assembler
libraries that they, amazingly, don't want to write again)

If 32/64-bit code is ever enabled for the 64-bit OS then we'll have to
revisit parts of this patch, but it shouldn't be difficult to extend.

-eric
 
-- 
Eric Christopher <echristo@redhat.com>

2003-05-27  Eric Christopher  <echristo@redhat.com>

	* config/s390/s390.h: Add tpf support.
	(POINTERS_EXTEND_UNSIGNED): Define. Set to -1.
	* config/s390/s390.c (s390_emit_prologue): Change
	temp register for tpf target. Add hooks for tpf
	profiling.
	(s390_emit_epilogue): Add hooks for tpf
	profiling.
	* config/s390/s390.md (ptr_extend): New pattern.


Index: s390.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.c,v
retrieving revision 1.93
diff -u -p -w -r1.93 s390.c
--- s390.c	16 May 2003 18:57:45 -0000	1.93
+++ s390.c	27 May 2003 20:26:32 -0000
@@ -5328,11 +5328,13 @@ s390_emit_prologue ()
 
   s390_frame_info ();
 
-  /* Choose best register to use for temp use within prologue.  */
+  /* Choose best register to use for temp use within prologue.
+     See below for why TPF cannot use the register 1.  */
   
   if (!current_function_is_leaf
       && !has_hard_reg_initial_val (Pmode, RETURN_REGNUM)
-      && get_pool_size () < S390_POOL_CHUNK_MAX / 2)
+      && get_pool_size () < S390_POOL_CHUNK_MAX / 2
+      && !TARGET_TPF)
     temp_reg = gen_rtx_REG (Pmode, RETURN_REGNUM);
   else
     temp_reg = gen_rtx_REG (Pmode, 1);
@@ -5503,6 +5505,32 @@ s390_emit_prologue ()
                                                REG_NOTES (insn));
 	}
     }      
+
+  if (TARGET_TPF)
+    {
+      /* Generate a BAS instruction to serve as a function
+	 entry intercept to facilitate the use of tracing
+	 algorithms located at the branch target.
+
+	 This must use register 1.  */
+      rtx addr;
+      rtx unkn;
+      rtx link;
+
+      addr = gen_rtx_CONST_INT (HImode, 0xfe0);
+      unkn = gen_rtx_CONST_INT (SImode, 0);
+      link = gen_rtx_REG (Pmode, 1);
+
+      if (!TARGET_64BIT)
+	insn = emit_insn (gen_bas_31 (addr, unkn, link));
+      else
+	insn = emit_insn (gen_bas_64 (addr, unkn, link));
+
+      /* Emit a blockage here so that all code
+	 lies between the profiling mechanisms.  */
+      emit_insn (gen_blockage ());
+    }
+
 }
 
 /* Expand the epilogue into a bunch of separate insns.  */
@@ -5513,6 +5541,33 @@ s390_emit_epilogue ()
   rtx frame_pointer, return_reg;
   int area_bottom, area_top, offset = 0;
   rtvec p;
+
+  if (TARGET_TPF)
+    {
+
+      /* Generate a BAS instruction to serve as a function
+	 entry intercept to facilitate the use of tracing
+	 algorithms located at the branch target.
+
+	 This must use register 1.  */
+
+      rtx addr;
+      rtx unkn;
+      rtx link;
+
+      addr = gen_rtx_CONST_INT (HImode, 0xfe6);
+      unkn = gen_rtx_CONST_INT (SImode, 0);
+      link = gen_rtx_REG (Pmode, 1);
+
+      /* Emit a blockage here so that all code
+         lies between the profiling mechanisms.  */
+      if (!TARGET_64BIT)
+	emit_insn (gen_bas_31 (addr, unkn, link));
+      else
+	emit_insn (gen_bas_64 (addr, unkn, link));
+
+      emit_insn (gen_blockage ());
+    }
 
   /* Check whether to use frame or stack pointer for restore.  */
 
Index: s390.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.h,v
retrieving revision 1.74
diff -u -p -w -r1.74 s390.h
--- s390.h	14 May 2003 07:29:52 -0000	1.74
+++ s390.h	27 May 2003 20:26:33 -0000
@@ -75,6 +75,7 @@ extern int target_flags;
 #define MASK_64BIT                 0x10
 #define MASK_ZARCH                 0x20
 #define MASK_MVCLE                 0x40
+#define MASK_TPF                   0x80
 
 #define TARGET_HARD_FLOAT          (target_flags & MASK_HARD_FLOAT)
 #define TARGET_SOFT_FLOAT          (!(target_flags & MASK_HARD_FLOAT))
@@ -84,6 +85,7 @@ extern int target_flags;
 #define TARGET_64BIT               (target_flags & MASK_64BIT)
 #define TARGET_ZARCH               (target_flags & MASK_ZARCH)
 #define TARGET_MVCLE               (target_flags & MASK_MVCLE)
+#define TARGET_TPF                 (target_flags & MASK_TPF)
 
 /* ??? Once this actually works, it could be made a runtime option.  */
 #define TARGET_IBM_FLOAT           0
@@ -110,6 +112,8 @@ extern int target_flags;
   { "esa",         -32, N_("ESA/390 architecture")},                   \
   { "mvcle",        64, N_("mvcle use")},                              \
   { "no-mvcle",    -64, N_("mvc&ex")},                                 \
+  { "tpf",         128, N_("enable tpf OS code")},                     \
+  { "no-tpf",     -128, N_("disable tpf OS code")},                    \
   { "", TARGET_DEFAULT, 0 } }
 
 #define TARGET_OPTIONS                                          \
@@ -1058,6 +1062,15 @@ extern int s390_nr_constants;
    After generation of rtl, the compiler makes no further distinction
    between pointers and any other objects of this machine mode.  */
 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
+
+/* A C expression whose value is zero if pointers that need to be extended
+   from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and one if
+   they are zero-extended and negative one if there is an ptr_extend operation.
+
+   You need not define this macro if the `POINTER_SIZE' is equal to the width
+   of `Pmode'.  */
+/* This is -1 for "pointer mode" extend.  See ptr_extend in s390.md.  */
+#define POINTERS_EXTEND_UNSIGNED -1
 
 /* A function address in a call instruction is a byte address (for
    indexing purposes) so give the MEM rtx a byte's mode.  */
Index: s390.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.md,v
retrieving revision 1.55
diff -u -p -w -r1.55 s390.md
--- s390.md	13 May 2003 14:33:16 -0000	1.55
+++ s390.md	27 May 2003 20:26:35 -0000
@@ -7066,3 +7066,17 @@
 }
   [(set_attr "op_type" "NN")
    (set_attr "type"    "larl")])
+
+;; Instruction definition to extend a 31-bit pointer into a 64-bit
+;; pointer. This is used for compatability.
+
+(define_expand "ptr_extend"
+  [(set (match_operand:DI 0 "register_operand" "=r")
+        (match_operand:SI 1 "register_operand" "r"))]
+   ""
+   "
+{
+  emit_insn (gen_zero_extendsidi2 (operands[0], operands[1]));
+  emit_insn (gen_anddi3 (operands[0], operands[0], GEN_INT (0x7fffffff)));
+  DONE;
+}")