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Re: [arm] inhibit LDM peepholes for xscale
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Philip Blundell <pb at nexus dot co dot uk>
- Cc: gcc-patches at gcc dot gnu dot org, Richard dot Earnshaw at arm dot com
- Date: Tue, 20 May 2003 17:15:46 +0100
- Subject: Re: [arm] inhibit LDM peepholes for xscale
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
> When tuning for xscale, peepholing two LDRs into an LDM would generally
> be a loss.
>
> In fact, arith_adjacentmem looks like it will sometimes transform two
> LDRs into an ADD followed by an LDM, which is probably a loss on any
> Harvard core. But I guess we can worry about that separately.
>
> p.
>
>
> 2003-05-16 Philip Blundell <philb@gnu.org>
>
> * config/arm/arm.c (load_multiple_sequence): Avoid LDM if tuning
> for xscale and not -Os.
> (store_multiple_sequence): Likewise.
> * config/arm/arm.md (arith_adjacentmem): Likewise.
>
Hmm, OK, but a little bit reluctantly. We must find a way to express
these tuning differences without having to test a myriad of target bits.
This particular optimization should also be off for ARM9, 10 and StrongARM
cores.
R.