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[patch] h8300.md: Add new patterns.


Hi,

Attached is a patch to add new patterns.

The patterns accept bit insertions when the combiner generates them.

Tested on h8300 port.  Committed.

Kazu Hirata

2003-03-20  Kazu Hirata  <kazu at cs dot umass dot edu>

	* config/h8300/h8300.md (*insv_si_1_n): New.
	(*insv_si_1_n_lshiftrt): Likewise.

Index: h8300.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/h8300/h8300.md,v
retrieving revision 1.196
diff -u -r1.196 h8300.md
--- h8300.md	20 Mar 2003 16:03:34 -0000	1.196
+++ h8300.md	20 Mar 2003 18:01:41 -0000
@@ -2643,6 +2643,31 @@
 ;; COMBINE PATTERNS
 ;; -----------------------------------------------------------------
 
+;; insv:SI
+
+(define_insn "*insv_si_1_n"
+  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
+			 (const_int 1)
+			 (match_operand:SI 1 "const_int_operand" "n"))
+	(match_operand:SI 2 "register_operand" "r"))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && INTVAL (operands[1]) < 16"
+  "bld\\t#0,%w2\;bst\\t%Z1,%Y0"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "4")])
+
+(define_insn "*insv_si_1_n_lshiftrt"
+  [(set (zero_extract:SI (match_operand:SI 0 "register_operand" "+r")
+			 (const_int 1)
+			 (match_operand:SI 1 "const_int_operand" "n"))
+	(lshiftrt:SI (match_operand:SI 2 "register_operand" "r")
+		     (match_operand:SI 3 "const_int_operand" "n")))]
+  "(TARGET_H8300H || TARGET_H8300S)
+   && INTVAL (operands[1]) < 16"
+  "bld\\t%Z3,%Y2\;bst\\t%Z1,%Y0"
+  [(set_attr "cc" "clobber")
+   (set_attr "length" "4")])
+
 ;; extzv:SI
 
 (define_insn "*extzv_8_8"


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