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mips64: improve code generated for 64->32-bit truncation


This patch takes advantage of the fact that sll <reg>,<reg>,0 is
guaranteed to sign-extend the result to 64-bits (in all 64-bit MIPS
architecture descriptions I've seen, anyway) to generate better code
for truncdisi2.  There's still room for improvement here, since we
could use lw to truncate from memory to register and sw to truncate
from register to memory, but this would be trickier, and the mips
rewrite branch is about to be merged in anyway, so I didn't take the
trouble of investigating the less immediate improvement.  Ok to
install?

Index: gcc/ChangeLog
from  Alexandre Oliva  <aoliva at redhat dot com>

	* config/mips/mips.md (truncdisi2): Use a single sll instruction
	in non-MIPS16 mode.

Index: gcc/config/mips/mips.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/mips/mips.md,v
retrieving revision 1.163
diff -u -p -r1.163 mips.md
--- gcc/config/mips/mips.md 18 Feb 2003 23:24:23 -0000 1.163
+++ gcc/config/mips/mips.md 20 Mar 2003 01:58:10 -0000
@@ -3917,12 +3917,12 @@ move\\t%0,%z4\\n\\
 {
   if (TARGET_MIPS16)
     return \"dsll\\t%0,%1,32\;dsra\\t%0,32\";
-  return \"dsll\\t%0,%1,32\;dsra\\t%0,%0,32\";
+  return \"sll\\t%0,%1,0\";
 }"
   [(set_attr "type"	"darith")
    (set_attr "mode"	"SI")
    (set (attr "length")	(if_then_else (eq (symbol_ref "mips16") (const_int 0))
-				      (const_int 8)
+				      (const_int 4)
 				      (const_int 16)))])
 
 (define_insn "truncdihi2"
-- 
Alexandre Oliva   Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer                 aoliva at {redhat dot com, gcc.gnu.org}
CS PhD student at IC-Unicamp        oliva at {lsd dot ic dot unicamp dot br, gnu.org}
Free Software Evangelist                Professional serial bug killer

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