This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
S/390: Minor performance regression fixes
- From: Ulrich Weigand <weigand at immd1 dot informatik dot uni-erlangen dot de>
- To: gcc-patches at gcc dot gnu dot org
- Date: Wed, 19 Mar 2003 16:06:35 +0100 (MET)
- Subject: S/390: Minor performance regression fixes
Hello,
this patch fixes a couple of minor performance regressions
in 3.3 / head relative to older compilers. Specifically:
- Somewhat reduce the usage of MVC to reduce cache contention.
- In base+index addressing, prefer to place the pointer value
in the base, not the index register.
- Do not use "o2"/"o3" type attributes for insn_and_split
dummy insns; this appears to confuse the pre-reload scheduler
more than it helps.
Bootstrapped/regtested on s390-ibm-linux and s390x-ibm-linux
on 3.3 branch and head; applied to both.
ChangeLog:
* config/s390/s390.c (s390_preferred_reload_class): Do not
force constants to the pool unless necessary.
(s390_decompose_address): Prefer to use pointer as base,
not index register.
* config/s390/s390.md ("*tsthiCCT_only"): Remove '?' from
Q alternative.
("*movdi_64", "*movsi", "movhi", "movqi_64", "movqi",
"*movdf_64", "*movsf"): Add '?' to Q->Q alternatives.
("*extractqi", "*extracthi", "*zero_extendhisi2_31",
"*zero_extendqisi2_31", "*zero_extendqihi2_31",
"*adddi3_31", "*subdi3_31"): Do not set "type" attribute.
Index: gcc/config/s390/s390.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.c,v
retrieving revision 1.81
diff -c -p -r1.81 s390.c
*** gcc/config/s390/s390.c 6 Feb 2003 01:23:41 -0000 1.81
--- gcc/config/s390/s390.c 18 Mar 2003 18:43:37 -0000
*************** s390_preferred_reload_class (op, class)
*** 1674,1696 ****
switch (GET_CODE (op))
{
/* Constants we cannot reload must be forced into the
! literal pool. For constants we *could* handle directly,
! it might still be preferable to put them in the pool and
! use a memory-to-memory instruction.
!
! However, try to avoid needlessly allocating a literal
! pool in a routine that wouldn't otherwise need any.
! Heuristically, we assume that 64-bit leaf functions
! typically don't need a literal pool, all others do. */
case CONST_DOUBLE:
case CONST_INT:
! if (!legitimate_reload_constant_p (op))
! return NO_REGS;
!
! if (TARGET_64BIT && current_function_is_leaf)
return class;
!
! return NO_REGS;
/* If a symbolic constant or a PLUS is reloaded,
it is most likely being used as an address, so
--- 1674,1687 ----
switch (GET_CODE (op))
{
/* Constants we cannot reload must be forced into the
! literal pool. */
!
case CONST_DOUBLE:
case CONST_INT:
! if (legitimate_reload_constant_p (op))
return class;
! else
! return NO_REGS;
/* If a symbolic constant or a PLUS is reloaded,
it is most likely being used as an address, so
*************** s390_decompose_address (addr, out)
*** 1878,1883 ****
--- 1869,1890 ----
else
disp = addr; /* displacement */
+
+ /* Prefer to use pointer as base, not index. */
+ if (base && indx)
+ {
+ int base_ptr = GET_CODE (base) == UNSPEC
+ || (REG_P (base) && REG_POINTER (base));
+ int indx_ptr = GET_CODE (indx) == UNSPEC
+ || (REG_P (indx) && REG_POINTER (indx));
+
+ if (!base_ptr && indx_ptr)
+ {
+ rtx tmp = base;
+ base = indx;
+ indx = tmp;
+ }
+ }
/* Validate base register. */
if (base)
Index: gcc/config/s390/s390.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/s390/s390.md,v
retrieving revision 1.50
diff -c -p -r1.50 s390.md
*** gcc/config/s390/s390.md 18 Mar 2003 18:28:53 -0000 1.50
--- gcc/config/s390/s390.md 18 Mar 2003 18:43:39 -0000
***************
*** 608,614 ****
(define_insn "*tsthiCCT_cconly"
[(set (reg 33)
! (compare (match_operand:HI 0 "nonimmediate_operand" "?Q,d")
(match_operand:HI 1 "const0_operand" "")))
(clobber (match_scratch:HI 2 "=d,X"))]
"s390_match_ccmode(insn, CCTmode)"
--- 608,614 ----
(define_insn "*tsthiCCT_cconly"
[(set (reg 33)
! (compare (match_operand:HI 0 "nonimmediate_operand" "Q,d")
(match_operand:HI 1 "const0_operand" "")))
(clobber (match_scratch:HI 2 "=d,X"))]
"s390_match_ccmode(insn, CCTmode)"
***************
*** 1028,1035 ****
(set_attr "type" "larl")])
(define_insn "*movdi_64"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,Q")
! (match_operand:DI 1 "general_operand" "d,m,d,*f,m,*f,Q"))]
"TARGET_64BIT"
"@
lgr\\t%0,%1
--- 1028,1035 ----
(set_attr "type" "larl")])
(define_insn "*movdi_64"
! [(set (match_operand:DI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,?Q")
! (match_operand:DI 1 "general_operand" "d,m,d,*f,m,*f,?Q"))]
"TARGET_64BIT"
"@
lgr\\t%0,%1
***************
*** 1187,1194 ****
[(set_attr "op_type" "RI")])
(define_insn "*movsi"
! [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,Q")
! (match_operand:SI 1 "general_operand" "d,m,d,*f,m,*f,Q"))]
""
"@
lr\\t%0,%1
--- 1187,1194 ----
[(set_attr "op_type" "RI")])
(define_insn "*movsi"
! [(set (match_operand:SI 0 "nonimmediate_operand" "=d,d,m,!*f,!*f,!m,?Q")
! (match_operand:SI 1 "general_operand" "d,m,d,*f,m,*f,?Q"))]
""
"@
lr\\t%0,%1
***************
*** 1217,1224 ****
;
(define_insn "movhi"
! [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m,Q")
! (match_operand:HI 1 "general_operand" "d,n,m,d,Q"))]
""
"@
lr\\t%0,%1
--- 1217,1224 ----
;
(define_insn "movhi"
! [(set (match_operand:HI 0 "nonimmediate_operand" "=d,d,d,m,?Q")
! (match_operand:HI 1 "general_operand" "d,n,m,d,?Q"))]
""
"@
lr\\t%0,%1
***************
*** 1244,1251 ****
;
(define_insn "movqi_64"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,Q")
! (match_operand:QI 1 "general_operand" "d,n,m,d,n,Q"))]
"TARGET_64BIT"
"@
lr\\t%0,%1
--- 1244,1251 ----
;
(define_insn "movqi_64"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,?Q")
! (match_operand:QI 1 "general_operand" "d,n,m,d,n,?Q"))]
"TARGET_64BIT"
"@
lr\\t%0,%1
***************
*** 1258,1265 ****
(set_attr "type" "lr,*,*,store,store,cs")])
(define_insn "movqi"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,Q")
! (match_operand:QI 1 "general_operand" "d,n,m,d,n,Q"))]
""
"@
lr\\t%0,%1
--- 1258,1265 ----
(set_attr "type" "lr,*,*,store,store,cs")])
(define_insn "movqi"
! [(set (match_operand:QI 0 "nonimmediate_operand" "=d,d,d,m,Q,?Q")
! (match_operand:QI 1 "general_operand" "d,n,m,d,n,?Q"))]
""
"@
lr\\t%0,%1
***************
*** 1338,1345 ****
}")
(define_insn "*movdf_64"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,d,m,Q")
! (match_operand:DF 1 "general_operand" "f,m,f,d,m,d,Q"))]
"TARGET_64BIT"
"@
ldr\\t%0,%1
--- 1338,1345 ----
}")
(define_insn "*movdf_64"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,f,m,d,d,m,?Q")
! (match_operand:DF 1 "general_operand" "f,m,f,d,m,d,?Q"))]
"TARGET_64BIT"
"@
ldr\\t%0,%1
***************
*** 1438,1445 ****
}")
(define_insn "*movsf"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,m,d,d,m,Q")
! (match_operand:SF 1 "general_operand" "f,m,f,d,m,d,Q"))]
""
"@
ler\\t%0,%1
--- 1438,1445 ----
}")
(define_insn "*movsf"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f,f,m,d,d,m,?Q")
! (match_operand:SF 1 "general_operand" "f,m,f,d,m,d,?Q"))]
""
"@
ler\\t%0,%1
***************
*** 2086,2093 ****
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
operands[1] = change_address (operands[1], QImode, 0);
}"
! [(set_attr "type" "o2")
! (set_attr "atype" "agen")])
(define_insn_and_split "*extracthi"
[(set (match_operand:SI 0 "register_operand" "=d")
--- 2086,2092 ----
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
operands[1] = change_address (operands[1], QImode, 0);
}"
! [(set_attr "atype" "agen")])
(define_insn_and_split "*extracthi"
[(set (match_operand:SI 0 "register_operand" "=d")
***************
*** 2108,2115 ****
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
operands[1] = change_address (operands[1], HImode, 0);
}"
! [(set_attr "type" "o2")
! (set_attr "atype" "agen")])
;
; extendsidi2 instruction pattern(s).
--- 2107,2113 ----
operands[2] = GEN_INT (32 - INTVAL (operands[2]));
operands[1] = change_address (operands[1], HImode, 0);
}"
! [(set_attr "atype" "agen")])
;
; extendsidi2 instruction pattern(s).
***************
*** 2404,2411 ****
[(set (strict_low_part (match_dup 2)) (match_dup 1))
(clobber (reg:CC 33))])]
"operands[2] = gen_lowpart (HImode, operands[0]);"
! [(set_attr "type" "o2")
! (set_attr "atype" "agen")])
;
; zero_extendqisi2 instruction pattern(s).
--- 2402,2408 ----
[(set (strict_low_part (match_dup 2)) (match_dup 1))
(clobber (reg:CC 33))])]
"operands[2] = gen_lowpart (HImode, operands[0]);"
! [(set_attr "atype" "agen")])
;
; zero_extendqisi2 instruction pattern(s).
***************
*** 2439,2446 ****
[(set (match_dup 0) (const_int 0))
(set (strict_low_part (match_dup 2)) (match_dup 1))]
"operands[2] = gen_lowpart (QImode, operands[0]);"
! [(set_attr "type" "o2")
! (set_attr "atype" "agen")])
;
; zero_extendqihi2 instruction pattern(s).
--- 2436,2442 ----
[(set (match_dup 0) (const_int 0))
(set (strict_low_part (match_dup 2)) (match_dup 1))]
"operands[2] = gen_lowpart (QImode, operands[0]);"
! [(set_attr "atype" "agen")])
;
; zero_extendqihi2 instruction pattern(s).
***************
*** 2474,2481 ****
[(set (match_dup 0) (const_int 0))
(set (strict_low_part (match_dup 2)) (match_dup 1))]
"operands[2] = gen_lowpart (QImode, operands[0]);"
! [(set_attr "type" "o2")
! (set_attr "atype" "agen")])
;
--- 2470,2476 ----
[(set (match_dup 0) (const_int 0))
(set (strict_low_part (match_dup 2)) (match_dup 1))]
"operands[2] = gen_lowpart (QImode, operands[0]);"
! [(set_attr "atype" "agen")])
;
***************
*** 3067,3074 ****
operands[7] = operand_subword (operands[1], 1, 1, DImode);
operands[8] = operand_subword (operands[2], 1, 1, DImode);
operands[9] = gen_label_rtx ();"
! [(set_attr "op_type" "NN")
! (set_attr "type" "o3")])
(define_expand "adddi3"
[(parallel
--- 3062,3068 ----
operands[7] = operand_subword (operands[1], 1, 1, DImode);
operands[8] = operand_subword (operands[2], 1, 1, DImode);
operands[9] = gen_label_rtx ();"
! [(set_attr "op_type" "NN")])
(define_expand "adddi3"
[(parallel
***************
*** 3532,3539 ****
operands[7] = operand_subword (operands[1], 1, 1, DImode);
operands[8] = operand_subword (operands[2], 1, 1, DImode);
operands[9] = gen_label_rtx ();"
! [(set_attr "op_type" "NN")
! (set_attr "type" "o3")])
(define_expand "subdi3"
[(parallel
--- 3526,3532 ----
operands[7] = operand_subword (operands[1], 1, 1, DImode);
operands[8] = operand_subword (operands[2], 1, 1, DImode);
operands[9] = gen_label_rtx ();"
! [(set_attr "op_type" "NN")])
(define_expand "subdi3"
[(parallel
Bye,
Ulrich
--
Dr. Ulrich Weigand
weigand at informatik dot uni-erlangen dot de