This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: Unit-at-time related PRs


Jim Wilson <wilson at redhat dot com> writes:

> On some of the compact ISAs, e.g. SH, Thumb (ARM), MIPS16, the only
> addressing mode you have for getting to global data is pc-relative
> with an 8 bit offset.  The only way to make this work is to have per
> function constant tables which are placed inside the function if the
> function is larger than 256 bytes.

I say this not knowing much about these ISAs, but my understanding is
that they are not register-starved, and register-indirect addressing
is available.  Thus, what about an implementation similar to x86 PIC
mode, where a register is dedicated to hold the address of a shared
constant pool, and loaded at the beginning of each function?

zw


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]