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Fix bug in i386.md - REG_ATTRS were lost
- From: Josef Zlomek <zlomj9am at artax dot karlin dot mff dot cuni dot cz>
- To: gcc-patches at gcc dot gnu dot org
- Date: Thu, 20 Feb 2003 10:13:27 +0100
- Subject: Fix bug in i386.md - REG_ATTRS were lost
Hi,
this patch fixes some patterns in i386.md
Without this patch REG_ATTRS are lost in peephole.
This insn
(insn:HI 13 5 94 0 0x2a955be720 (set (reg/v:SI 3 ebx [orig:61 i1 ] [61])
(const_int 0 [0x0])) 45 {*movsi_1_nointernunit} (nil)
(nil))
is converted to
(insn 98 5 94 0 0x2a955be720 (parallel [
(set (reg/v:SI 3 ebx)
(const_int 0 [0x0]))
(clobber (reg:CC 17 flags))
]) -1 (nil)
(expr_list:REG_UNUSED (reg:CC 17 flags)
(nil)))
and the REG_ATTRS [orig:61 i1 ] were lost for ebx.
This patch fixes it.
I have fixed this pattern and also some other patters which also use get_rtx_REG for copying the register from their parameter.
Bootstrapped/regtested x86-64.
OK for mainline?
Joe
2003-02-20 Josef Zlomek <zlomekj at suse dot cz>
* config/i386/i386.md: Use gen_lowpart instead of gen_rtx_REG for copying
a register.
Index: i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.435
diff -c -3 -p -r1.435 i386.md
*** i386.md 16 Feb 2003 01:35:36 -0000 1.435
--- i386.md 19 Feb 2003 16:42:04 -0000
***************
*** 9911,9917 ****
[(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = gen_int_mode (0x80000000, SImode);
! operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));")
(define_split
[(set (match_operand 0 "memory_operand" "")
--- 9911,9917 ----
[(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = gen_int_mode (0x80000000, SImode);
! operands[0] = gen_lowpart (SImode, operands[0]);")
(define_split
[(set (match_operand 0 "memory_operand" "")
***************
*** 10384,10390 ****
[(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = gen_int_mode (~0x80000000, SImode);
! operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));")
(define_split
[(set (match_operand 0 "memory_operand" "")
--- 10384,10390 ----
[(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
(clobber (reg:CC 17))])]
"operands[1] = gen_int_mode (~0x80000000, SImode);
! operands[0] = gen_lowpart (SImode, operands[0]);")
(define_split
[(set (match_operand 0 "memory_operand" "")
***************
*** 13913,13919 ****
(match_dup 2))]
{
operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
! operands[5] = gen_rtx_REG (QImode, REGNO (operands[3]));
ix86_expand_clear (operands[3]);
})
--- 13913,13919 ----
(match_dup 2))]
{
operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
! operands[5] = gen_lowpart (QImode, operands[3]);
ix86_expand_clear (operands[3]);
})
***************
*** 13935,13941 ****
(match_dup 2))]
{
operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
! operands[5] = gen_rtx_REG (QImode, REGNO (operands[3]));
ix86_expand_clear (operands[3]);
})
--- 13935,13941 ----
(match_dup 2))]
{
operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
! operands[5] = gen_lowpart (QImode, operands[3]);
ix86_expand_clear (operands[3]);
})
***************
*** 17766,17772 ****
[(parallel [(set (match_dup 2) (const_int 0))
(clobber (reg:CC 17))])
(set (match_dup 0) (match_dup 1))]
! "operands[2] = gen_rtx_REG (SImode, true_regnum (operands[1]));")
(define_peephole2
[(match_scratch:QI 1 "q")
--- 17766,17772 ----
[(parallel [(set (match_dup 2) (const_int 0))
(clobber (reg:CC 17))])
(set (match_dup 0) (match_dup 1))]
! "operands[2] = gen_lowpart (SImode, operands[1]);")
(define_peephole2
[(match_scratch:QI 1 "q")
***************
*** 17780,17786 ****
[(parallel [(set (match_dup 2) (const_int 0))
(clobber (reg:CC 17))])
(set (match_dup 0) (match_dup 1))]
! "operands[2] = gen_rtx_REG (SImode, true_regnum (operands[1]));")
(define_peephole2
[(match_scratch:SI 2 "r")
--- 17780,17786 ----
[(parallel [(set (match_dup 2) (const_int 0))
(clobber (reg:CC 17))])
(set (match_dup 0) (match_dup 1))]
! "operands[2] = gen_lowpart (SImode, operands[1]);")
(define_peephole2
[(match_scratch:SI 2 "r")
***************
*** 18035,18042 ****
&& peep2_regno_dead_p (0, FLAGS_REG)"
[(parallel [(set (match_dup 0) (const_int 0))
(clobber (reg:CC 17))])]
! "operands[0] = gen_rtx_REG (GET_MODE (operands[0]) == DImode ? DImode : SImode,
! true_regnum (operands[0]));")
(define_peephole2
[(set (strict_low_part (match_operand 0 "register_operand" ""))
--- 18035,18042 ----
&& peep2_regno_dead_p (0, FLAGS_REG)"
[(parallel [(set (match_dup 0) (const_int 0))
(clobber (reg:CC 17))])]
! "operands[0] = gen_lowpart (GET_MODE (operands[0]) == DImode ? DImode : SImode,
! operands[0]);")
(define_peephole2
[(set (strict_low_part (match_operand 0 "register_operand" ""))
***************
*** 18059,18066 ****
&& peep2_regno_dead_p (0, FLAGS_REG)"
[(parallel [(set (match_dup 0) (const_int -1))
(clobber (reg:CC 17))])]
! "operands[0] = gen_rtx_REG (GET_MODE (operands[0]) == DImode ? DImode : SImode,
! true_regnum (operands[0]));")
;; Attempt to convert simple leas to adds. These can be created by
;; move expanders.
--- 18059,18066 ----
&& peep2_regno_dead_p (0, FLAGS_REG)"
[(parallel [(set (match_dup 0) (const_int -1))
(clobber (reg:CC 17))])]
! "operands[0] = gen_lowpart (GET_MODE (operands[0]) == DImode ? DImode : SImode,
! operands[0]);")
;; Attempt to convert simple leas to adds. These can be created by
;; move expanders.