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Re: [altivec] patch for gcc.dg/altivec-5.c


I'm going to punt this off to David or Geoff because I don't quite
agree (but I may be wrong).

AltiVec only accepts [REG+REG], so I'm confused why you would accept
an invalid addressing mode.  Perhaps your patch is hiding some other
bug?

Geoff?  David?

On Sat, Jan 04, 2003 at 08:18:23AM +0100, Segher Boessenkool wrote:
> With this patch, the compiler doesn't ICE anymore, and generates
> valid output.  It still does a lwz from a non-aligned address
> though, but I think that's unrelated: that vector is passed on
> the stack, so GCC will have to handle it somehow.
> 
> 
> 
> 2002-12-29  Segher Boessenkool  <segher@koffie.nl>
> 
> 	* config/rs6000/rs6000.h (LEGITIMATE_OFFSET_ADDRESS_P):
> 	Fix gcc.dg/altivec-5.c, by accepting reg+offset addressing
> 	until reload phase.
> 
> 
> 
> *** ../../gcc-clean/gcc/config/rs6000/rs6000.h	Fri Dec 27 03:21:40 2002
> --- ./config/rs6000/rs6000.h	Sun Dec 29 04:43:53 2002
> *************** typedef struct rs6000_args
> *** 2065,2072 ****
>     && GET_CODE (XEXP (X, 0)) == REG				\
>     && INT_REG_OK_FOR_BASE_P (XEXP (X, 0), (STRICT))		\
>     && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0)		\
> !   && (! ALTIVEC_VECTOR_MODE (MODE)                            \
> !       || (GET_CODE (XEXP (X,1)) == CONST_INT && INTVAL (XEXP (X,1)) == 0)) \
>     && (! SPE_VECTOR_MODE (MODE)					\
>         || (GET_CODE (XEXP (X, 1)) == CONST_INT			\
>   	  && SPE_CONST_OFFSET_OK (INTVAL (XEXP (X, 1)))))	\
> --- 2065,2073 ----
>     && GET_CODE (XEXP (X, 0)) == REG				\
>     && INT_REG_OK_FOR_BASE_P (XEXP (X, 0), (STRICT))		\
>     && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0)		\
> !   && (! ALTIVEC_VECTOR_MODE (MODE)				\
> !       || (GET_CODE (XEXP (X,1)) == CONST_INT			\
> ! 	  && (! STRICT || INTVAL (XEXP (X,1)) == 0)))		\
>     && (! SPE_VECTOR_MODE (MODE)					\
>         || (GET_CODE (XEXP (X, 1)) == CONST_INT			\
>   	  && SPE_CONST_OFFSET_OK (INTVAL (XEXP (X, 1)))))	\


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