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[3.4-BIB] Fix infinite recursion during ADA bootstrap on i486 II
- From: Jan Hubicka <jh at suse dot cz>
- To: gcc-patches at gcc dot gnu dot org, rth at cygnus dot com
- Date: Sat, 30 Nov 2002 18:04:17 +0100
- Subject: [3.4-BIB] Fix infinite recursion during ADA bootstrap on i486 II
Hi,
Some extra checking shown that I did a thinko in mode promoting stuff.
Bootstrapped both i386 and i486 with Ada on BIB branch.
OK now?
Sat Nov 30 17:09:33 CET 2002 Jan Hubicka <jh@suse.cz>
* i386.c (ix86_expand_int_movcc): Always optimize constants;
promote HImode to SImode early; fix reversed BRANCH_COST test;
be curefull about infinite recursion.
*** i386.c Thu Nov 28 23:53:41 2002
--- /aux/hubicka/hammer/gcc/gcc/config/i386/i386.c Sat Nov 30 17:43:45 2002
*************** ix86_expand_int_movcc (operands)
*** 9273,9280 ****
/* Don't attempt mode expansion here -- if we had to expand 5 or 6
HImode insns, we'd be swallowed in word prefix ops. */
! if ((mode != HImode || TARGET_FAST_PREFIX)
! && (mode != DImode || TARGET_64BIT)
&& GET_CODE (operands[2]) == CONST_INT
&& GET_CODE (operands[3]) == CONST_INT)
{
--- 9173,9179 ----
/* Don't attempt mode expansion here -- if we had to expand 5 or 6
HImode insns, we'd be swallowed in word prefix ops. */
! if ((mode != DImode || TARGET_64BIT)
&& GET_CODE (operands[2]) == CONST_INT
&& GET_CODE (operands[3]) == CONST_INT)
{
*************** ix86_expand_int_movcc (operands)
*** 9282,9287 ****
--- 9181,9195 ----
HOST_WIDE_INT ct = INTVAL (operands[2]);
HOST_WIDE_INT cf = INTVAL (operands[3]);
HOST_WIDE_INT diff;
+ enum machine_mode cmovmode = mode;
+
+ /* Promote OUT into SImode to avoid extra prefix operations.
+ Since we can generate minus and neg, we can't rely on insn splitting
+ to do the job. */
+ if (GET_MODE (out) == HImode
+ && !TARGET_PARTIAL_REG_STALL
+ && (REG_P (out) || GET_CODE (out) == SUBREG))
+ out = gen_lowpart (SImode, out), cmovmode = SImode;
diff = ct - cf;
/* Sign bit compares are better done using shifts than we do by using
*************** ix86_expand_int_movcc (operands)
*** 9310,9318 ****
if (reg_overlap_mentioned_p (out, ix86_compare_op0)
|| reg_overlap_mentioned_p (out, ix86_compare_op1))
! tmp = gen_reg_rtx (mode);
! if (mode == DImode)
emit_insn (gen_x86_movdicc_0_m1_rex64 (tmp));
else
emit_insn (gen_x86_movsicc_0_m1 (gen_lowpart (SImode, tmp)));
--- 9218,9226 ----
if (reg_overlap_mentioned_p (out, ix86_compare_op0)
|| reg_overlap_mentioned_p (out, ix86_compare_op1))
! tmp = gen_reg_rtx (cmovmode);
! if (cmovmode == DImode)
emit_insn (gen_x86_movdicc_0_m1_rex64 (tmp));
else
emit_insn (gen_x86_movsicc_0_m1 (gen_lowpart (SImode, tmp)));
*************** ix86_expand_int_movcc (operands)
*** 9341,9347 ****
* Size 5 - 8.
*/
if (ct)
! tmp = expand_simple_binop (mode, PLUS,
tmp, GEN_INT (ct),
copy_rtx (tmp), 1, OPTAB_DIRECT);
}
--- 9249,9255 ----
* Size 5 - 8.
*/
if (ct)
! tmp = expand_simple_binop (cmovmode, PLUS,
tmp, GEN_INT (ct),
copy_rtx (tmp), 1, OPTAB_DIRECT);
}
*************** ix86_expand_int_movcc (operands)
*** 9354,9360 ****
*
* Size 8.
*/
! tmp = expand_simple_binop (mode, IOR,
tmp, GEN_INT (ct),
copy_rtx (tmp), 1, OPTAB_DIRECT);
}
--- 9262,9268 ----
*
* Size 8.
*/
! tmp = expand_simple_binop (cmovmode, IOR,
tmp, GEN_INT (ct),
copy_rtx (tmp), 1, OPTAB_DIRECT);
}
*************** ix86_expand_int_movcc (operands)
*** 9368,9376 ****
*
* Size 8 - 11.
*/
! tmp = expand_simple_unop (mode, NOT, tmp, copy_rtx (tmp), 1);
if (cf)
! tmp = expand_simple_binop (mode, PLUS,
copy_rtx (tmp), GEN_INT (cf),
copy_rtx (tmp), 1, OPTAB_DIRECT);
}
--- 9276,9284 ----
*
* Size 8 - 11.
*/
! tmp = expand_simple_unop (cmovmode, NOT, tmp, copy_rtx (tmp), 1);
if (cf)
! tmp = expand_simple_binop (cmovmode, PLUS,
copy_rtx (tmp), GEN_INT (cf),
copy_rtx (tmp), 1, OPTAB_DIRECT);
}
*************** ix86_expand_int_movcc (operands)
*** 9390,9404 ****
{
cf = ct;
ct = 0;
! tmp = expand_simple_unop (mode, NOT, tmp, copy_rtx (tmp), 1);
}
! tmp = expand_simple_binop (mode, AND,
copy_rtx (tmp),
! gen_int_mode (cf - ct, mode),
copy_rtx (tmp), 1, OPTAB_DIRECT);
if (ct)
! tmp = expand_simple_binop (mode, PLUS,
copy_rtx (tmp), GEN_INT (ct),
copy_rtx (tmp), 1, OPTAB_DIRECT);
}
--- 9298,9312 ----
{
cf = ct;
ct = 0;
! tmp = expand_simple_unop (cmovmode, NOT, tmp, copy_rtx (tmp), 1);
}
! tmp = expand_simple_binop (cmovmode, AND,
copy_rtx (tmp),
! gen_int_mode (cf - ct, cmovmode),
copy_rtx (tmp), 1, OPTAB_DIRECT);
if (ct)
! tmp = expand_simple_binop (cmovmode, PLUS,
copy_rtx (tmp), GEN_INT (ct),
copy_rtx (tmp), 1, OPTAB_DIRECT);
}
*************** ix86_expand_int_movcc (operands)
*** 9474,9480 ****
out = emit_store_flag (out, code, ix86_compare_op0,
ix86_compare_op1, VOIDmode, 0, -1);
! out = expand_simple_binop (mode, IOR,
out, GEN_INT (cf),
out, 1, OPTAB_DIRECT);
if (out != operands[0])
--- 9382,9388 ----
out = emit_store_flag (out, code, ix86_compare_op0,
ix86_compare_op1, VOIDmode, 0, -1);
! out = expand_simple_binop (cmovmode, IOR,
out, GEN_INT (cf),
out, 1, OPTAB_DIRECT);
if (out != operands[0])
*************** ix86_expand_int_movcc (operands)
*** 9487,9494 ****
if ((diff == 1 || diff == 2 || diff == 4 || diff == 8
|| diff == 3 || diff == 5 || diff == 9)
! && ((mode != QImode && mode != HImode) || !TARGET_PARTIAL_REG_STALL)
! && (mode != DImode || x86_64_sign_extended_value (GEN_INT (cf))))
{
/*
* xorl dest,dest
--- 9395,9403 ----
if ((diff == 1 || diff == 2 || diff == 4 || diff == 8
|| diff == 3 || diff == 5 || diff == 9)
! && ((cmovmode != QImode && cmovmode != HImode)
! || !TARGET_PARTIAL_REG_STALL)
! && (cmovmode != DImode || x86_64_sign_extended_value (GEN_INT (cf))))
{
/*
* xorl dest,dest
*************** ix86_expand_int_movcc (operands)
*** 9516,9532 ****
{
rtx out1;
out1 = out;
! tmp = gen_rtx_MULT (mode, out1, GEN_INT (diff & ~1));
nops++;
if (diff & 1)
{
! tmp = gen_rtx_PLUS (mode, tmp, out1);
nops++;
}
}
if (cf != 0)
{
! tmp = gen_rtx_PLUS (mode, tmp, GEN_INT (cf));
nops++;
}
if (!rtx_equal_p (tmp, out))
--- 9425,9441 ----
{
rtx out1;
out1 = out;
! tmp = gen_rtx_MULT (cmovmode, out1, GEN_INT (diff & ~1));
nops++;
if (diff & 1)
{
! tmp = gen_rtx_PLUS (cmovmode, tmp, out1);
nops++;
}
}
if (cf != 0)
{
! tmp = gen_rtx_PLUS (cmovmode, tmp, GEN_INT (cf));
nops++;
}
if (!rtx_equal_p (tmp, out))
*************** ix86_expand_int_movcc (operands)
*** 9545,9550 ****
--- 9454,9460 ----
else
emit_insn (gen_rtx_SET (VOIDmode, copy_rtx (out), copy_rtx (tmp)));
}
+ out = gen_lowpart (mode, out);
if (!rtx_equal_p (out, operands[0]))
emit_move_insn (operands[0], copy_rtx (out));
*************** ix86_expand_int_movcc (operands)
*** 9567,9573 ****
* for space.
*/
! if ((!TARGET_CMOVE || (mode == QImode && TARGET_PARTIAL_REG_STALL))
&& BRANCH_COST >= 2)
{
if (cf == 0)
--- 9477,9483 ----
* for space.
*/
! if ((!TARGET_CMOVE || (cmovmode == QImode && TARGET_PARTIAL_REG_STALL))
&& BRANCH_COST >= 2)
{
if (cf == 0)
*************** ix86_expand_int_movcc (operands)
*** 9622,9637 ****
out = emit_store_flag (out, code, ix86_compare_op0,
ix86_compare_op1, VOIDmode, 0, 1);
! out = expand_simple_binop (mode, PLUS, copy_rtx (out), constm1_rtx,
! copy_rtx (out), 1, OPTAB_DIRECT);
}
! out = expand_simple_binop (mode, AND, copy_rtx (out),
! gen_int_mode (cf - ct, mode),
copy_rtx (out), 1, OPTAB_DIRECT);
if (ct)
! out = expand_simple_binop (mode, PLUS, copy_rtx (out), GEN_INT (ct),
! copy_rtx (out), 1, OPTAB_DIRECT);
if (!rtx_equal_p (out, operands[0]))
emit_move_insn (operands[0], copy_rtx (out));
--- 9532,9550 ----
out = emit_store_flag (out, code, ix86_compare_op0,
ix86_compare_op1, VOIDmode, 0, 1);
! out = expand_simple_binop (cmovmode, PLUS, copy_rtx (out),
! constm1_rtx, copy_rtx (out), 1,
! OPTAB_DIRECT);
}
! out = expand_simple_binop (cmovmode, AND, copy_rtx (out),
! gen_int_mode (cf - ct, cmovmode),
copy_rtx (out), 1, OPTAB_DIRECT);
if (ct)
! out = expand_simple_binop (cmovmode, PLUS, copy_rtx (out),
! GEN_INT (ct), copy_rtx (out), 1,
! OPTAB_DIRECT);
! out = gen_lowpart (mode, out);
if (!rtx_equal_p (out, operands[0]))
emit_move_insn (operands[0], copy_rtx (out));
*************** ix86_expand_int_movcc (operands)
*** 9646,9652 ****
optab op;
rtx var, orig_out, out, tmp;
! if (BRANCH_COST >= 2)
return 0; /* FAIL */
/* If one of the two operands is an interesting constant, load a
--- 9559,9565 ----
optab op;
rtx var, orig_out, out, tmp;
! if (BRANCH_COST <= 2)
return 0; /* FAIL */
/* If one of the two operands is an interesting constant, load a
*************** ix86_expand_int_movcc (operands)
*** 9655,9663 ****
if (GET_CODE (operands[2]) == CONST_INT)
{
var = operands[3];
! if (INTVAL (operands[2]) == 0)
operands[3] = constm1_rtx, op = and_optab;
! else if (INTVAL (operands[2]) == -1)
operands[3] = const0_rtx, op = ior_optab;
else
return 0; /* FAIL */
--- 9568,9576 ----
if (GET_CODE (operands[2]) == CONST_INT)
{
var = operands[3];
! if (INTVAL (operands[2]) == 0 && operands[3] != constm1_rtx)
operands[3] = constm1_rtx, op = and_optab;
! else if (INTVAL (operands[2]) == -1 && operands[3] != const0_rtx)
operands[3] = const0_rtx, op = ior_optab;
else
return 0; /* FAIL */
*************** ix86_expand_int_movcc (operands)
*** 9665,9673 ****
else if (GET_CODE (operands[3]) == CONST_INT)
{
var = operands[2];
! if (INTVAL (operands[3]) == 0)
operands[2] = constm1_rtx, op = and_optab;
! else if (INTVAL (operands[3]) == -1)
operands[2] = const0_rtx, op = ior_optab;
else
return 0; /* FAIL */
--- 9578,9586 ----
else if (GET_CODE (operands[3]) == CONST_INT)
{
var = operands[2];
! if (INTVAL (operands[3]) == 0 && operands[2] != constm1_rtx)
operands[2] = constm1_rtx, op = and_optab;
! else if (INTVAL (operands[3]) == -1 && operands[3] != const0_rtx)
operands[2] = const0_rtx, op = ior_optab;
else
return 0; /* FAIL */