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fix athlon move costs
- From: Jan Hubicka <jh at suse dot cz>
- To: gcc-patches at gcc dot gnu dot org, rth at cygnus dot com
- Date: Thu, 3 Oct 2002 23:39:12 +0200
- Subject: fix athlon move costs
Hi,
The attached patch fixes the move costs according to the updated AMD
documentation. It also fixes several PRS crashing on reloading MMX to
SSE as the previous costs made this very fast and thus made SSE to
appear in preffered class.
I am installing the patch to mainline as obvious, OK for the 3.2 branch too?
Honza
* i386.c (athlon_cost): Fix the move costs.
Index: i386.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.c,v
retrieving revision 1.462
diff -c -3 -p -r1.462 i386.c
*** i386.c 27 Sep 2002 13:30:08 -0000 1.462
--- i386.c 2 Oct 2002 15:00:24 -0000
*************** struct processor_costs athlon_cost = {
*** 285,309 ****
8, /* "large" insn */
9, /* MOVE_RATIO */
4, /* cost for loading QImode using movzbl */
! {4, 5, 4}, /* cost of loading integer registers
in QImode, HImode and SImode.
Relative to reg-reg move (2). */
! {2, 3, 2}, /* cost of storing integer registers */
4, /* cost of reg,reg fld/fst */
! {6, 6, 20}, /* cost of loading fp registers
in SFmode, DFmode and XFmode */
! {4, 4, 16}, /* cost of loading integer registers */
2, /* cost of moving MMX register */
! {2, 2}, /* cost of loading MMX registers
in SImode and DImode */
! {2, 2}, /* cost of storing MMX registers
in SImode and DImode */
2, /* cost of moving SSE register */
! {2, 2, 8}, /* cost of loading SSE registers
in SImode, DImode and TImode */
! {2, 2, 8}, /* cost of storing SSE registers
in SImode, DImode and TImode */
! 6, /* MMX or SSE register to integer */
64, /* size of prefetch block */
6, /* number of parallel prefetches */
};
--- 285,309 ----
8, /* "large" insn */
9, /* MOVE_RATIO */
4, /* cost for loading QImode using movzbl */
! {3, 4, 3}, /* cost of loading integer registers
in QImode, HImode and SImode.
Relative to reg-reg move (2). */
! {3, 4, 3}, /* cost of storing integer registers */
4, /* cost of reg,reg fld/fst */
! {4, 4, 12}, /* cost of loading fp registers
in SFmode, DFmode and XFmode */
! {6, 6, 8}, /* cost of loading integer registers */
2, /* cost of moving MMX register */
! {4, 4}, /* cost of loading MMX registers
in SImode and DImode */
! {4, 4}, /* cost of storing MMX registers
in SImode and DImode */
2, /* cost of moving SSE register */
! {4, 4, 6}, /* cost of loading SSE registers
in SImode, DImode and TImode */
! {4, 4, 5}, /* cost of storing SSE registers
in SImode, DImode and TImode */
! 5, /* MMX or SSE register to integer */
64, /* size of prefetch block */
6, /* number of parallel prefetches */
};