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Re: Performance regression
- From: Dale Johannesen <dalej at apple dot com>
- To: David Edelsohn <dje at watson dot ibm dot com>
- Cc: Dale Johannesen <dalej at apple dot com>, Roger Sayle <roger at eyesopen dot com>, Richard dot Earnshaw at arm dot com, Jim Wilson <wilson at redhat dot com>, gcc-patches at gcc dot gnu dot org
- Date: Wed, 25 Sep 2002 11:05:12 -0700
- Subject: Re: Performance regression
On Wednesday, September 25, 2002, at 10:32 AM, David Edelsohn wrote:
The PowerPC backend implements moves in common code in rs6000.c.
I think one would implement the equivalent to the ARM optimization with
the following patch. I am a little worried about selecting the correct
pseudo mode -- the load extend instruction is identical, but the
resulting
mode may be wider than necessary.
David
Your patch didn't quite work, but this one does, for my small example
and
for the benchmark it came from. I'll test it more. Thanks.
*************** rs6000_emit_move (dest, source, mode)
*** 3792,3799 ****
return;
}
! if (! no_new_pseudos && GET_CODE (operands[0]) != REG)
operands[1] = force_reg (mode, operands[1]);
if (mode == SFmode && ! TARGET_POWERPC
&& TARGET_HARD_FLOAT && TARGET_FPRS
--- 3792,3812 ----
return;
}
! if (!no_new_pseudos)
! {
! if (GET_CODE (operands[1]) == MEM && optimize > 0
! && (mode==QImode || mode==HImode))
! {
! rtx reg = gen_reg_rtx (SImode);
!
! emit_insn (gen_rtx_SET (SImode,
! reg,
! gen_rtx_ZERO_EXTEND (Pmode, operands[1])));
! operands[1] = gen_lowpart (mode, reg);
! }
! if (GET_CODE (operands[0]) != REG)
operands[1] = force_reg (mode, operands[1]);
+ }
if (mode == SFmode && ! TARGET_POWERPC
&& TARGET_HARD_FLOAT && TARGET_FPRS