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Re: [RFC] PowerPC DFA description
- From: David Edelsohn <dje at watson dot ibm dot com>
- To: Daniel Egger <degger at fhm dot edu>
- Cc: Vladimir Makarov <vmakarov at redhat dot com>, dalej at apple dot com, Daniel Berlin <dan at dberlin dot org>, GCC Patches <gcc-patches at gcc dot gnu dot org>
- Date: Wed, 29 May 2002 18:15:47 -0400
- Subject: Re: [RFC] PowerPC DFA description
Maybe we need separate automata for each Altivec function unit,
but I don't understand your need to add vec_permute2.
As far as modeling completion units, the goal is not to write a
simulator for the chip because that model would be too complex to be
efficient. Daniel Berlin tried something like that -- it slowed down the
compiler too much.
David