This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: [RFC] PowerPC DFA description
- From: law at redhat dot com
- To: David Edelsohn <dje at watson dot ibm dot com>
- Cc: Vladimir Makarov <vmakarov at redhat dot com>, dalej at apple dot com, Daniel Berlin <dan at dberlin dot org>, gcc-patches at gcc dot gnu dot org
- Date: Wed, 29 May 2002 16:12:44 -0600
- Subject: Re: [RFC] PowerPC DFA description
- Reply-to: law at redhat dot com
In message <200205292125.RAA26742@makai.watson.ibm.com>, David Edelsohn writes:
> >>>>> Vladimir Makarov writes:
>
> Vlad> I'll look at this. David. But at the first look, to have smaller
> Vlad> automata, fpu1 fpu2 should be not in the same automata as fpu1_iter an
> d
> Vlad> fpu2_iter because fpu1/fpu2 is reserved always short time and
> Vlad> fpu1_iter/fpu2_iter is reserved during long time. The automaton
> Vlad> containing them will have too many combinations of fpu1/fpu2
> Vlad> reservations during maximal time reservations of fpu1_other/fpu2_other
> Vlad> (26 cycles). To achieve it without the genattrtab complaint, we could
> Vlad> reserve fpu_iter1/fpu_iter2 only starting with the second cycle. The
> Vlad> description will behave the same way but the automata will be smaller.
>
> I tried to preserve fpu1_iter and fpu2_iter in separate automata,
> as in the original description, but genautomata complained:
I think Vlad is telling you that you're going to have to twiddle the
define_insn_reservations slightly as well.
Vlad, perhaps a before/after example from his PPC DFA sample code would help
David understand more clearly what you're suggesting.
jeff