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fr30: Do not split immediate loads unless the destination is a register
- From: Nick Clifton <nickc at cambridge dot redhat dot com>
- To: gcc-patches at gcc dot gnu dot org
- Date: 13 May 2002 11:53:16 +0100
- Subject: fr30: Do not split immediate loads unless the destination is a register
Hi Guys,
I am applying the patch below, developed by Scott Marks, to fix a
problem building newlib with the FR30 port of gcc:
newlib/libc/stdlib/strtod.c: In function `_strtod_r':
newlib/libc/stdlib/strtod.c:712: unrecognizable insn:
(insn 3524 3523 1286 (set:SI (subreg:SI (reg/v:DI 62) 4)
(sign_extend:SI (subreg:QI (subreg:SI (reg/v:DI 62) 4) 0))) -1 (nil)
(nil))
The split was being used too early, and although this is probably
not the best way to fix the problem, it does work.
Cheers
Nick
2002-05-13 Scott Marks <SMarks@mobile-mind.com>
* config/fr30/fr30.md: Only allow splits of immediate loads
if the destination is a register.
Index: gcc/config/fr30/fr30.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/fr30/fr30.md,v
retrieving revision 1.12
diff -c -3 -p -w -r1.12 fr30.md
*** gcc/config/fr30/fr30.md 20 Mar 2002 21:58:56 -0000 1.12
--- gcc/config/fr30/fr30.md 13 May 2002 10:24:38 -0000
***************
*** 288,294 ****
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "immediate_operand" ""))]
! "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128"
[(set:SI (match_dup 0) (match_dup 2))
(set:SI (match_dup 0) (sign_extend:SI (subreg:QI (match_dup 0) 0)))]
"{
--- 287,294 ----
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "immediate_operand" ""))]
! "INTVAL (operands[1]) <= -1 && INTVAL (operands[1]) >= -128
! && GET_CODE (operands[0]) == REG"
[(set:SI (match_dup 0) (match_dup 2))
(set:SI (match_dup 0) (sign_extend:SI (subreg:QI (match_dup 0) 0)))]
"{
***************
*** 302,308 ****
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "immediate_operand" ""))]
! "(INTVAL (operands[1]) < 0) && ((INTVAL (operands[1]) & 0x00ffffff) == 0)"
[(set:SI (match_dup 0) (match_dup 2))
(parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (const_int 24)))
(clobber (reg:CC 16))])]
--- 302,309 ----
(define_split
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "immediate_operand" ""))]
! "(INTVAL (operands[1]) < 0) && ((INTVAL (operands[1]) & 0x00ffffff) == 0)
! && GET_CODE (operands[0]) == REG"
[(set:SI (match_dup 0) (match_dup 2))
(parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (const_int 24)))
(clobber (reg:CC 16))])]
***************
*** 320,326 ****
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "immediate_operand" ""))]
"(INTVAL (operands[1]) > 0x00ffffff)
! && ((INTVAL (operands[1]) >> exact_log2 (INTVAL (operands[1]) & (- INTVAL (operands[1])))) < 0x100)"
[(set:SI (match_dup 0) (match_dup 2))
(parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (match_dup 3)))
(clobber (reg:CC 16))])]
--- 321,328 ----
[(set (match_operand:SI 0 "register_operand" "")
(match_operand:SI 1 "immediate_operand" ""))]
"(INTVAL (operands[1]) > 0x00ffffff)
! && ((INTVAL (operands[1]) >> exact_log2 (INTVAL (operands[1]) & (- INTVAL (operands[1])))) < 0x100)
! && GET_CODE (operands[0]) == REG"
[(set:SI (match_dup 0) (match_dup 2))
(parallel [(set:SI (match_dup 0) (ashift:SI (match_dup 0) (match_dup 3)))
(clobber (reg:CC 16))])]