This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: IA64 performance patch


On Mon, Mar 04, 2002 at 03:31:15PM -0800, Steve Ellcey wrote:
> Here is an IA64 specific patch that fixes this by using different
> virtual registers to save/restore the gp for each function call.  When
> not optimizing or when there are setjumps we still use a single fixed
> register.

Do they always get unified such that they only take up one
register or stack slot?

I'm not sure that this is important enough to address on the
branch, and for mainline I think it's the wrong approach.
There, we should simply not expose the gp register at all as
early as we do.

The earliest should probably be the instruction splitting
pass just before sched1.  Even better would be to use
optimize_mode_switching to place the (single) copy from
the gp to the save register.


r~


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]