This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]
Other format: [Raw text]

Re: inicializace lokal. promennych


> 
> int
> tl1 (int x)
> {
>   int i, s;
>   for (s = i = 0; i < 10; i++)
>     {
>       s += i;
>       printf ("%d\n", i);
>     }
>   return s + x;
> }
> 
...
> 
>         xorl    %esi, %esi      #
>         xorl    %ebx, %ebx      #
> 
...
> 
>         movl    $0, %ebx        #,  i
>         movl    $0, %esi        #,  s
> 
I've commited the attached patch to cfg branch that avoid direct generation
of registers in favour of gen_lowpart.

Fri Feb 15 19:02:23 CET 2002  Jan Hubicka  <jh@suse.cz>
	* (abs and mov splitters/peep2s): Avoid generating of new register.
Index: i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.325.2.4
diff -c -3 -p -r1.325.2.4 i386.md
*** i386.md	2002/02/09 19:25:36	1.325.2.4
--- i386.md	2002/02/15 18:01:05
***************
*** 9465,9471 ****
    [(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
  	      (clobber (reg:CC 17))])]
    "operands[1] = GEN_INT (trunc_int_for_mode (0x80000000, SImode));
!    operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));")
  
  (define_split
    [(set (match_operand 0 "memory_operand" "")
--- 9465,9471 ----
    [(parallel [(set (match_dup 0) (xor:SI (match_dup 0) (match_dup 1)))
  	      (clobber (reg:CC 17))])]
    "operands[1] = GEN_INT (trunc_int_for_mode (0x80000000, SImode));
!    operands[0] = gen_lowpart (SImode, operands[0]);")
  
  (define_split
    [(set (match_operand 0 "memory_operand" "")
***************
*** 9917,9923 ****
    [(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
  	      (clobber (reg:CC 17))])]
    "operands[1] = GEN_INT (trunc_int_for_mode (~0x80000000, SImode));
!    operands[0] = gen_rtx_REG (SImode, REGNO (operands[0]));")
  
  (define_split
    [(set (match_operand 0 "memory_operand" "")
--- 9917,9923 ----
    [(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 1)))
  	      (clobber (reg:CC 17))])]
    "operands[1] = GEN_INT (trunc_int_for_mode (~0x80000000, SImode));
!    operands[0] = gen_lowpart (SImode, operands[0]);")
  
  (define_split
    [(set (match_operand 0 "memory_operand" "")
***************
*** 13282,13288 ****
  	(match_dup 2))]
  {
    operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
!   operands[5] = gen_rtx_REG (QImode, REGNO (operands[3]));
    ix86_expand_clear (operands[3]);
  })
  
--- 13282,13288 ----
  	(match_dup 2))]
  {
    operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
!   operands[5] = gen_lowpart (QImode, operands[3]);
    ix86_expand_clear (operands[3]);
  })
  
***************
*** 13304,13310 ****
  	(match_dup 2))]
  {
    operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
!   operands[5] = gen_rtx_REG (QImode, REGNO (operands[3]));
    ix86_expand_clear (operands[3]);
  })
  
--- 13304,13310 ----
  	(match_dup 2))]
  {
    operands[4] = gen_rtx_REG (GET_MODE (operands[0]), 17);
!   operands[5] = gen_lowpart (QImode, operands[3]);
    ix86_expand_clear (operands[3]);
  })
  
***************
*** 16862,16868 ****
    [(parallel [(set (match_dup 2) (const_int 0))
  	      (clobber (reg:CC 17))])
     (set (match_dup 0) (match_dup 1))]
!   "operands[2] = gen_rtx_REG (SImode, true_regnum (operands[1]));")
  
  (define_peephole2
    [(match_scratch:QI 1 "q")
--- 16862,16868 ----
    [(parallel [(set (match_dup 2) (const_int 0))
  	      (clobber (reg:CC 17))])
     (set (match_dup 0) (match_dup 1))]
!   "operands[2] = gen_lowpart (SImode, operands[1]);")
  
  (define_peephole2
    [(match_scratch:QI 1 "q")
***************
*** 16876,16882 ****
    [(parallel [(set (match_dup 2) (const_int 0))
  	      (clobber (reg:CC 17))])
     (set (match_dup 0) (match_dup 1))]
!   "operands[2] = gen_rtx_REG (SImode, true_regnum (operands[1]));")
  
  (define_peephole2
    [(match_scratch:SI 2 "r")
--- 16876,16882 ----
    [(parallel [(set (match_dup 2) (const_int 0))
  	      (clobber (reg:CC 17))])
     (set (match_dup 0) (match_dup 1))]
!   "operands[2] = gen_lowpart (SImode, operands[1]);")
  
  (define_peephole2
    [(match_scratch:SI 2 "r")
***************
*** 17130,17137 ****
     && peep2_regno_dead_p (0, FLAGS_REG)"
    [(parallel [(set (match_dup 0) (const_int 0))
  	      (clobber (reg:CC 17))])]
!   "operands[0] = gen_rtx_REG (GET_MODE (operands[0]) == DImode ? DImode : SImode,
! 			      true_regnum (operands[0]));")
  
  (define_peephole2
    [(set (strict_low_part (match_operand 0 "register_operand" ""))
--- 17130,17138 ----
     && peep2_regno_dead_p (0, FLAGS_REG)"
    [(parallel [(set (match_dup 0) (const_int 0))
  	      (clobber (reg:CC 17))])]
!   "operands[0] = gen_lowpart (GET_MODE (operands[0]) == DImode
! 			      ? DImode : SImode,
! 			      operands[0]);")
  
  (define_peephole2
    [(set (strict_low_part (match_operand 0 "register_operand" ""))
***************
*** 17154,17161 ****
     && peep2_regno_dead_p (0, FLAGS_REG)"
    [(parallel [(set (match_dup 0) (const_int -1))
  	      (clobber (reg:CC 17))])]
!   "operands[0] = gen_rtx_REG (GET_MODE (operands[0]) == DImode ? DImode : SImode,
! 			      true_regnum (operands[0]));")
  
  ;; Attempt to convert simple leas to adds. These can be created by
  ;; move expanders.
--- 17155,17163 ----
     && peep2_regno_dead_p (0, FLAGS_REG)"
    [(parallel [(set (match_dup 0) (const_int -1))
  	      (clobber (reg:CC 17))])]
!   "operands[0] = gen_lowpart (GET_MODE (operands[0]) == DImode
! 			      ? DImode : SImode,
! 			      operands[0]);")
  
  ;; Attempt to convert simple leas to adds. These can be created by
  ;; move expanders.


Index Nav: [Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav: [Date Prev] [Date Next] [Thread Prev] [Thread Next]