This is the mail archive of the gcc-patches@gcc.gnu.org mailing list for the GCC project.

Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]
Other format:	[Raw text]

altivec: mov patterns, add m<-r and r<-r

From: Aldy Hernandez <aldyh at redhat dot com>
To: gcc-patches at gcc dot gnu dot org, dje at watson dot ibm dot com
Date: Thu, 14 Feb 2002 14:17:34 +1100
Subject: altivec: mov patterns, add m<-r and r<-r

optimizing vector initializers has gcc generating all sorts 
of interesting combinations.

here is a patch to add m<-r and r<-r moves for vector modes, where
r is a GPR.

ok?

2002-02-14  Aldy Hernandez  <aldyh@redhat.com>

	* config/rs6000/rs6000.md ("*movv4si_internal"): Add m<-r and r<-r
	alternatives.
	("*movv8hi_internal1"): Same.
	("*movv16qi_internal1"): Same.
	("*movv4sf_internal1"): Same.

	* config/rs6000/rs6000.c (rs6000_legitimize_reload_address): Do
	not push_reload for altivec modes.

Index: config/rs6000/rs6000.md
===================================================================
RCS file: /cvs/uberbaum/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.166
diff -c -p -r1.166 rs6000.md
*** rs6000.md	2002/02/13 04:00:27	1.166
--- rs6000.md	2002/02/14 03:15:54
***************
*** 13935,13950 ****
    "{ rs6000_emit_move (operands[0], operands[1], V4SImode); DONE; }")
  
  (define_insn "*movv4si_internal"
!   [(set (match_operand:V4SI 0 "nonimmediate_operand" "=m,v,v,m")
! 	(match_operand:V4SI 1 "input_operand" "v,m,v,r"))]
    "TARGET_ALTIVEC"
    "@
     stvx %1,%y0
     lvx %0,%y1
     vor %0,%1,%1
!    stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0"
    [(set_attr "type" "altivec")
!    (set_attr "length" "*,*,*,16")])
  
  (define_expand "movv8hi"
    [(set (match_operand:V8HI 0 "nonimmediate_operand" "")
--- 13935,13952 ----
    "{ rs6000_emit_move (operands[0], operands[1], V4SImode); DONE; }")
  
  (define_insn "*movv4si_internal"
!   [(set (match_operand:V4SI 0 "nonimmediate_operand" "=m,v,v,m,r,r")
! 	(match_operand:V4SI 1 "input_operand" "v,m,v,r,m,r"))]
    "TARGET_ALTIVEC"
    "@
     stvx %1,%y0
     lvx %0,%y1
     vor %0,%1,%1
!    stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
!    lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
!    mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
    [(set_attr "type" "altivec")
!    (set_attr "length" "*,*,*,16,16,16")])
  
  (define_expand "movv8hi"
    [(set (match_operand:V8HI 0 "nonimmediate_operand" "")
***************
*** 13953,13968 ****
    "{ rs6000_emit_move (operands[0], operands[1], V8HImode); DONE; }")
  
  (define_insn "*movv8hi_internal1"
!   [(set (match_operand:V8HI 0 "nonimmediate_operand" "=m,v,v,m")
! 	(match_operand:V8HI 1 "input_operand" "v,m,v,r"))]
    "TARGET_ALTIVEC"
    "@
     stvx %1,%y0
     lvx %0,%y1
     vor %0,%1,%1
!    stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0"
    [(set_attr "type" "altivec")
!    (set_attr "length" "*,*,*,16")])
  
  (define_expand "movv16qi"
    [(set (match_operand:V16QI 0 "nonimmediate_operand" "")
--- 13955,13972 ----
    "{ rs6000_emit_move (operands[0], operands[1], V8HImode); DONE; }")
  
  (define_insn "*movv8hi_internal1"
!   [(set (match_operand:V8HI 0 "nonimmediate_operand" "=m,v,v,m,r,r")
! 	(match_operand:V8HI 1 "input_operand" "v,m,v,r,m,r"))]
    "TARGET_ALTIVEC"
    "@
     stvx %1,%y0
     lvx %0,%y1
     vor %0,%1,%1
!    stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
!    lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
!    mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
    [(set_attr "type" "altivec")
!    (set_attr "length" "*,*,*,16,16,16")])
  
  (define_expand "movv16qi"
    [(set (match_operand:V16QI 0 "nonimmediate_operand" "")
***************
*** 13971,13986 ****
    "{ rs6000_emit_move (operands[0], operands[1], V16QImode); DONE; }")
  
  (define_insn "*movv16qi_internal1"
!   [(set (match_operand:V16QI 0 "nonimmediate_operand" "=m,v,v,m")
! 	(match_operand:V16QI 1 "input_operand" "v,m,v,r"))]
    "TARGET_ALTIVEC"
    "@
     stvx %1,%y0
     lvx %0,%y1
     vor %0,%1,%1
!   stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0"
    [(set_attr "type" "altivec")
!    (set_attr "length" "*,*,*,16")])
  
  (define_expand "movv4sf"
    [(set (match_operand:V4SF 0 "nonimmediate_operand" "")
--- 13975,13992 ----
    "{ rs6000_emit_move (operands[0], operands[1], V16QImode); DONE; }")
  
  (define_insn "*movv16qi_internal1"
!   [(set (match_operand:V16QI 0 "nonimmediate_operand" "=m,v,v,m,r,r")
! 	(match_operand:V16QI 1 "input_operand" "v,m,v,r,m,r"))]
    "TARGET_ALTIVEC"
    "@
     stvx %1,%y0
     lvx %0,%y1
     vor %0,%1,%1
!   stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
!   lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
!   mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
    [(set_attr "type" "altivec")
!    (set_attr "length" "*,*,*,16,16,16")])
  
  (define_expand "movv4sf"
    [(set (match_operand:V4SF 0 "nonimmediate_operand" "")
***************
*** 13989,14004 ****
    "{ rs6000_emit_move (operands[0], operands[1], V4SFmode); DONE; }")
  
  (define_insn "*movv4sf_internal1"
!   [(set (match_operand:V4SF 0 "nonimmediate_operand" "=m,v,v,m")
! 	(match_operand:V4SF 1 "input_operand" "v,m,v,r"))]
    "TARGET_ALTIVEC"
    "@
     stvx %1,%y0
     lvx %0,%y1
     vor %0,%1,%1
!    stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0"
    [(set_attr "type" "altivec")
!    (set_attr "length" "*,*,*,16")])
  
  (define_insn "*set_vrsave_internal"
    [(match_parallel 0 "vrsave_operation"
--- 13995,14012 ----
    "{ rs6000_emit_move (operands[0], operands[1], V4SFmode); DONE; }")
  
  (define_insn "*movv4sf_internal1"
!   [(set (match_operand:V4SF 0 "nonimmediate_operand" "=m,v,v,m,r,r")
! 	(match_operand:V4SF 1 "input_operand" "v,m,v,r,m,r"))]
    "TARGET_ALTIVEC"
    "@
     stvx %1,%y0
     lvx %0,%y1
     vor %0,%1,%1
!    stw%U0 %1,%0\;stw %L1,%L0\;stw %Y1,%Y0\;stw %Z1,%Z0
!    lwz%U1 %0,%1\;lwz %L0,%L1\;lwz %Y0,%Y1\;lwz %Z0,%Z1
!    mr %0,%1\;mr %L0,%L1\;mr %Y0,%Y1\;mr %Z0,%Z1"
    [(set_attr "type" "altivec")
!    (set_attr "length" "*,*,*,16,16,16")])
  
  (define_insn "*set_vrsave_internal"
    [(match_parallel 0 "vrsave_operation"
Index: config/rs6000/rs6000.c
===================================================================
RCS file: /cvs/uberbaum/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.284
diff -c -p -r1.284 rs6000.c
*** rs6000.c	2002/02/13 04:00:26	1.284
--- rs6000.c	2002/02/14 03:16:01
*************** rs6000_legitimize_reload_address (x, mod
*** 1860,1866 ****
        && GET_CODE (XEXP (x, 0)) == REG
        && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
        && REG_MODE_OK_FOR_BASE_P (XEXP (x, 0), mode)
!       && GET_CODE (XEXP (x, 1)) == CONST_INT)
      {
        HOST_WIDE_INT val = INTVAL (XEXP (x, 1));
        HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;
--- 1860,1867 ----
        && GET_CODE (XEXP (x, 0)) == REG
        && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER
        && REG_MODE_OK_FOR_BASE_P (XEXP (x, 0), mode)
!       && GET_CODE (XEXP (x, 1)) == CONST_INT
!       && !ALTIVEC_VECTOR_MODE (mode))
      {
        HOST_WIDE_INT val = INTVAL (XEXP (x, 1));
        HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000;

Follow-Ups:
- Re: altivec: mov patterns, add m<-r and r<-r
  - From: David Edelsohn
- Re: altivec: mov patterns, add m<-r and r<-r
  - From: Richard Henderson

Index Nav:	[Date Index] [Subject Index] [Author Index] [Thread Index]
Message Nav:	[Date Prev] [Date Next]	[Thread Prev] [Thread Next]