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Re: altivec: parallels and constraints
- From: Geoff Keating <geoffk at geoffk dot org>
- To: Aldy Hernandez <aldyh at redhat dot com>
- Cc: gcc-patches at gcc dot gnu dot org
- Date: 15 Jan 2002 16:05:27 -0800
- Subject: Re: altivec: parallels and constraints
- References: <20020115235615.GA20838@redhat.com>
Aldy Hernandez <aldyh@redhat.com> writes:
> the lv* and st* variants cannot handle r0 on the second operand;
> i changed the constraint.
>
> i also added parallels to some of the store instructions because
> other similar altivec instructions had the same rtl, but were
> actually different instructions (some clear the cache lines, some do
> not). so i added a paralleled unspec so gcc doesn't try to get
> smart and use the wrong instruction.
>
> finally, rth suggested the rtl for the stv* instructions be exactly
> what's going on in hardware (masking off some bits), so i've
> also done that.
>
> ok?
This is OK. (Except, you didn't say on which platform you'd tested it.)
> 2002-01-15 Aldy Hernandez <aldyh@redhat.com>
>
> * config/rs6000/rs6000.md (altivec_stvx): Add parallels to stvx.
> (altivec_lvsl): Change constraint to b.
> (altivec_lvsr): Same.
> (altivec_lvebx): Same.
> (altivec_lvehx): Same.
> (altivec_lvewx): Same.
> (altivec_lvxl): Same.
> (altivec_lvx): Same.
> (altivec_stvx): Add parallel.
> (altivec_stvxl): Same.
> (altivec_stvehx): Same.
> (altivec_stvebx): Same.
> (altivec_stvebx): Same.
--
- Geoffrey Keating <geoffk@geoffk.org> <geoffk@redhat.com>