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PATCH, rs6000 (alpha?) long const


This patch fixes an incorrect add of a large immediate in
rs6000_emit_set_long_const.    d2 can not be added because it is greater
than 2^16.

To reproduce the problem, run the testsuite with the -maix64 switch.  A
large number of internal compiler errors are generated.   The one I
looked specifically was execute/920410-1.c

With the patch, -maix64 c failures are reduced from 216  to 115.

Looks like alpha also uses this logic.  Can someone familar with alpha
comment on the old logic's correctness?

Tom

--
Tom Rix
GCC Engineer
trix@redhat.com


2001-12-28  Tom Rix  <trix@redhat.com>

	* config/rs6000/rs6000.c (rs6000_emit_set_long_const): Fix invalid add 
	of large immediate.
 
diff -rcp gcc-old/gcc/config/rs6000/rs6000.c gcc/gcc/config/rs6000/rs6000.c
*** gcc-old/gcc/config/rs6000/rs6000.c	Fri Dec 28 10:00:02 2001
--- gcc/gcc/config/rs6000/rs6000.c	Fri Dec 28 22:59:44 2001
*************** rs6000_emit_set_long_const (dest, c1, c2
*** 2002,2008 ****
      }
    else
      {
!       HOST_WIDE_INT d1, d2, d3, d4;
  
    /* Decompose the entire word */
  #if HOST_BITS_PER_WIDE_INT >= 64
--- 2002,2008 ----
      }
    else
      {
!       HOST_WIDE_INT d1, d2, d2_s, d3, d4;
  
    /* Decompose the entire word */
  #if HOST_BITS_PER_WIDE_INT >= 64
*************** rs6000_emit_set_long_const (dest, c1, c2
*** 2011,2016 ****
--- 2011,2017 ----
        d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
        c1 -= d1;
        d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
+       d2_s = d2 >> 16;
        c1 = (c1 - d2) >> 32;
        d3 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
        c1 -= d3;
*************** rs6000_emit_set_long_const (dest, c1, c2
*** 2021,2026 ****
--- 2022,2028 ----
        d1 = ((c1 & 0xffff) ^ 0x8000) - 0x8000;
        c1 -= d1;
        d2 = ((c1 & 0xffffffff) ^ 0x80000000) - 0x80000000;
+       d2_s = d2 >> 16;
        if (c1 != d2)
  	abort ();
        c2 += (d2 < 0);
*************** rs6000_emit_set_long_const (dest, c1, c2
*** 2039,2056 ****
  	    emit_move_insn (dest,
  			    gen_rtx_PLUS (DImode, dest, GEN_INT (d3)));
  	}
!       else
  	emit_move_insn (dest, GEN_INT (d3));
  
        /* Shift it into place */
        if (d3 != 0 || d4 != 0)
! 	emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32)));
  
        /* Add in the low bits.  */
        if (d2 != 0)
! 	emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d2)));
        if (d1 != 0)
! 	emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d1)));
      }
  
    return dest;
--- 2041,2074 ----
  	    emit_move_insn (dest,
  			    gen_rtx_PLUS (DImode, dest, GEN_INT (d3)));
  	}
!       else if (d3 != 0)
  	emit_move_insn (dest, GEN_INT (d3));
  
        /* Shift it into place */
        if (d3 != 0 || d4 != 0)
!  	if (d2 != 0) 
!  	  emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (16)));
!  	else 
! 	  emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32)));
  
        /* Add in the low bits.  */
        if (d2 != 0)
! 	{
! 	  if (d3 != 0 || d4 != 0)
! 	    {
!  	      emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, 
!  						  GEN_INT (d2_s)));
!  	      emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest,  
!  						    GEN_INT (16)));
! 	    }
! 	  else
! 	    emit_move_insn (dest, GEN_INT (d2));
! 	}
        if (d1 != 0)
! 	if (d2 != 0 || d3 != 0 || d4 != 0)
! 	  emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d1)));
! 	else
! 	  emit_move_insn (dest, GEN_INT (d1));
      }
  
    return dest;

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