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Fix prefetch address generation for XScale


Hi Guys,

  The builtin-prefetch?.c tests have exposed a problem with the ARM
  port's implementation of the prefetch instruction.  The tests could
  generate an instruction of the form:

        (prefetch (plus:SI (reg:SI) (const_int 0)))

  which fails to be correctly converted into assembler because the
  pattern in the arm.md file is expecting:

        (prefetch (reg:SI))

  This patch fixes the problem by creating a new operand printing
  code: 'p' which treats the operand as the contents of a MEM and
  calls outpu_address on it.  This fixes all of the builtin-prefetch
  tests failures.

  Unless anyone objects I will apply this patch tomorrow.

Cheers
        Nick

2001-12-20  Nick Clifton  <nickc@cambridge.redhat.com>

	* config/arm/arm.c (arm_print_operand): Handle 'p' operand.
        Treat the operand as the contents of a MEM.
        * config/arm/arm.md (prefetch): Use 'p' operand print code.

Index: gcc/config/arm/arm.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.c,v
retrieving revision 1.180
diff -p -c -r1.180 arm.c
*** arm.c	2001/12/17 15:05:27	1.180
--- arm.c	2001/12/20 14:43:28
*************** arm_print_operand (stream, x, code)
*** 8504,8509 ****
--- 8518,8532 ----
  	fputs (thumb_condition_code (x, 1), stream);
        return;
  
+     case 'p':
+       /* Handle the prefetch instruction which has a MEM-like address
+ 	 as its operand.  */
+       if (GET_MODE (x) != SImode)
+ 	abort ();
+       output_memory_reference_mode = GET_MODE (x);
+       output_address (x);
+       break;
+       
      default:
        if (x == 0)
  	abort ();

Index: gcc/config/arm/arm.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/arm/arm.md,v
retrieving revision 1.86
diff -p -c -r1.86 arm.md
*** arm.md	2001/12/08 11:16:59	1.86
--- arm.md	2001/12/20 14:43:30
***************
*** 9175,9181 ****
  	     (match_operand:SI 1 "" "")
  	     (match_operand:SI 2 "" ""))]
    "TARGET_ARM && arm_arch5e"
!   "pld\\t[%0]")
  
  ;; General predication pattern
  
--- 9175,9181 ----
  	     (match_operand:SI 1 "" "")
  	     (match_operand:SI 2 "" ""))]
    "TARGET_ARM && arm_arch5e"
!   "pld\\t%p0")
  
  ;; General predication pattern
  


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