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x86 configure machinery take II



Hi,
this is updated patch for x86 config machinery and hope functional now.  It's goal is to
1) allow gcc to be configured for pentium2, pentium3, athlon-4 and friends
2) avoid use of magic constants matching enums between config.gcc and rest
3) allow SSE prefetch to be enabled by default, as it is nop for earlier platforms
   if gcc is configured for CPU supporting it.
4) add defines for each CPU variants to allow tunning in user code.
   It is bit dificult to handle pentium2, as existing code do have pentiumpro
   ifdef usually matching pentium2 too, so I define both constants in such case.

I've tested few main configurations - 586/pentiumpro/athlon
and all mcpu/march variants by hand to verify that sane defines and codegen decisions
are made.

Thu Dec 13 21:50:05 CET 2001  Jan Hubicka  <jh@suse.cz>
	* config.gcc: Revamp target_cpu_default2 to strings;
	support new x86 variants.
	* i386.c (override_options): Default x86_cpu_string and x86_arch_string
	properly; set prefetch_sse.
	* i386.h (x86_prefetch_sse): Declare.
	(TARGET_PREFETCH_SSE): New.
	(CPP_CPU_DEFAULT_SPEC): Define according to the new macros.
	(TARGET_CPU_DEFAULT_*): New.


diff -Nrc3p i386.oo/i386.c i386/i386.c
*** i386.oo/i386.c	Fri Dec 14 21:38:36 2001
--- i386/i386.c	Fri Dec 14 22:30:52 2001
*************** const char *ix86_fpmath_string;		/* for 
*** 592,597 ****
--- 609,617 ----
  /* # of registers to use to pass arguments.  */
  const char *ix86_regparm_string;
  
+ /* true if sse prefetch instruction is not NOOP.  */
+ int x86_prefetch_sse;
+ 
  /* ix86_regparm_string as a number */
  int ix86_regparm;
  
*************** override_options ()
*** 817,822 ****
--- 837,843 ----
        {&pentium4_cost, 0, 0, 0, 0, 0, 0, 0, 1}
      };
  
+   static const char *cpu_names[] = TARGET_CPU_DEFAULT_NAMES;
    static struct pta
      {
        const char *const name;		/* processor name or nickname.  */
*************** override_options ()
*** 826,832 ****
  	  PTA_SSE = 1,
  	  PTA_SSE2 = 2,
  	  PTA_MMX = 4,
! 	  PTA_SSEPREFETCH = 8,
  	  PTA_3DNOW = 16,
  	  PTA_3DNOW_A = 64
  	} flags;
--- 847,853 ----
  	  PTA_SSE = 1,
  	  PTA_SSE2 = 2,
  	  PTA_MMX = 4,
! 	  PTA_PREFETCH_SSE = 8,
  	  PTA_3DNOW = 16,
  	  PTA_3DNOW_A = 64
  	} flags;
*************** override_options ()
*** 841,861 ****
        {"i686", PROCESSOR_PENTIUMPRO, 0},
        {"pentiumpro", PROCESSOR_PENTIUMPRO, 0},
        {"pentium2", PROCESSOR_PENTIUMPRO, PTA_MMX},
!       {"pentium3", PROCESSOR_PENTIUMPRO, PTA_MMX | PTA_SSE | PTA_SSEPREFETCH},
        {"pentium4", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2 |
! 				       PTA_MMX | PTA_SSEPREFETCH},
        {"k6", PROCESSOR_K6, PTA_MMX},
        {"k6-2", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
        {"k6-3", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
!       {"athlon", PROCESSOR_ATHLON, PTA_MMX | PTA_SSEPREFETCH | PTA_3DNOW
  				   | PTA_3DNOW_A},
!       {"athlon-tbird", PROCESSOR_ATHLON, PTA_MMX | PTA_SSEPREFETCH
  					 | PTA_3DNOW | PTA_3DNOW_A},
!       {"athlon-4", PROCESSOR_ATHLON, PTA_MMX | PTA_SSEPREFETCH | PTA_3DNOW
  				    | PTA_3DNOW_A | PTA_SSE},
!       {"athlon-xp", PROCESSOR_ATHLON, PTA_MMX | PTA_SSEPREFETCH | PTA_3DNOW
  				      | PTA_3DNOW_A | PTA_SSE},
!       {"athlon-mp", PROCESSOR_ATHLON, PTA_MMX | PTA_SSEPREFETCH | PTA_3DNOW
  				      | PTA_3DNOW_A | PTA_SSE},
      };
  
--- 862,882 ----
        {"i686", PROCESSOR_PENTIUMPRO, 0},
        {"pentiumpro", PROCESSOR_PENTIUMPRO, 0},
        {"pentium2", PROCESSOR_PENTIUMPRO, PTA_MMX},
!       {"pentium3", PROCESSOR_PENTIUMPRO, PTA_MMX | PTA_SSE | PTA_PREFETCH_SSE},
        {"pentium4", PROCESSOR_PENTIUM4, PTA_SSE | PTA_SSE2 |
! 				       PTA_MMX | PTA_PREFETCH_SSE},
        {"k6", PROCESSOR_K6, PTA_MMX},
        {"k6-2", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
        {"k6-3", PROCESSOR_K6, PTA_MMX | PTA_3DNOW},
!       {"athlon", PROCESSOR_ATHLON, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW
  				   | PTA_3DNOW_A},
!       {"athlon-tbird", PROCESSOR_ATHLON, PTA_MMX | PTA_PREFETCH_SSE
  					 | PTA_3DNOW | PTA_3DNOW_A},
!       {"athlon-4", PROCESSOR_ATHLON, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW
  				    | PTA_3DNOW_A | PTA_SSE},
!       {"athlon-xp", PROCESSOR_ATHLON, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW
  				      | PTA_3DNOW_A | PTA_SSE},
!       {"athlon-mp", PROCESSOR_ATHLON, PTA_MMX | PTA_PREFETCH_SSE | PTA_3DNOW
  				      | PTA_3DNOW_A | PTA_SSE},
      };
  
*************** override_options ()
*** 865,872 ****
    SUBTARGET_OVERRIDE_OPTIONS;
  #endif
  
!   ix86_arch = PROCESSOR_I386;
!   ix86_cpu = (enum processor_type) TARGET_CPU_DEFAULT;
  
    if (ix86_cmodel_string != 0)
      {
--- 886,897 ----
    SUBTARGET_OVERRIDE_OPTIONS;
  #endif
  
!   if (!ix86_cpu_string && ix86_arch_string)
!     ix86_cpu_string = ix86_arch_string;
!   if (!ix86_cpu_string)
!     ix86_cpu_string = cpu_names [TARGET_CPU_DEFAULT];
!   if (!ix86_arch_string)
!     ix86_arch_string = TARGET_64BIT ? "athlon-4" : "i386";
  
    if (ix86_cmodel_string != 0)
      {
*************** override_options ()
*** 900,946 ****
      sorry ("%i-bit mode not compiled in",
  	   (target_flags & MASK_64BIT) ? 64 : 32);
  
!   if (ix86_arch_string != 0)
!     {
!       for (i = 0; i < pta_size; i++)
! 	if (! strcmp (ix86_arch_string, processor_alias_table[i].name))
! 	  {
! 	    ix86_arch = processor_alias_table[i].processor;
! 	    /* Default cpu tuning to the architecture.  */
! 	    ix86_cpu = ix86_arch;
! 	    if (processor_alias_table[i].flags & PTA_MMX
! 	        && !(target_flags & MASK_MMX_SET))
! 	      target_flags |= MASK_MMX;
! 	    if (processor_alias_table[i].flags & PTA_3DNOW
! 	        && !(target_flags & MASK_3DNOW_SET))
! 	      target_flags |= MASK_3DNOW;
! 	    if (processor_alias_table[i].flags & PTA_3DNOW_A
! 	        && !(target_flags & MASK_3DNOW_A_SET))
! 	      target_flags |= MASK_3DNOW_A;
! 	    if (processor_alias_table[i].flags & PTA_SSE
! 	        && !(target_flags & MASK_SSE_SET))
! 	      target_flags |= MASK_SSE;
! 	    if (processor_alias_table[i].flags & PTA_SSE2
! 	        && !(target_flags & MASK_SSE2_SET))
! 	      target_flags |= MASK_SSE2;
! 	    break;
! 	  }
  
!       if (i == pta_size)
! 	error ("bad value (%s) for -march= switch", ix86_arch_string);
!     }
  
!   if (ix86_cpu_string != 0)
!     {
!       for (i = 0; i < pta_size; i++)
! 	if (! strcmp (ix86_cpu_string, processor_alias_table[i].name))
! 	  {
! 	    ix86_cpu = processor_alias_table[i].processor;
! 	    break;
! 	  }
!       if (i == pta_size)
! 	error ("bad value (%s) for -mcpu= switch", ix86_cpu_string);
!     }
  
    if (optimize_size)
      ix86_cost = &size_cost;
--- 925,969 ----
      sorry ("%i-bit mode not compiled in",
  	   (target_flags & MASK_64BIT) ? 64 : 32);
  
!   for (i = 0; i < pta_size; i++)
!     if (! strcmp (ix86_arch_string, processor_alias_table[i].name))
!       {
! 	ix86_arch = processor_alias_table[i].processor;
! 	/* Default cpu tuning to the architecture.  */
! 	ix86_cpu = ix86_arch;
! 	if (processor_alias_table[i].flags & PTA_MMX
! 	    && !(target_flags & MASK_MMX_SET))
! 	  target_flags |= MASK_MMX;
! 	if (processor_alias_table[i].flags & PTA_3DNOW
! 	    && !(target_flags & MASK_3DNOW_SET))
! 	  target_flags |= MASK_3DNOW;
! 	if (processor_alias_table[i].flags & PTA_3DNOW_A
! 	    && !(target_flags & MASK_3DNOW_A_SET))
! 	  target_flags |= MASK_3DNOW_A;
! 	if (processor_alias_table[i].flags & PTA_SSE
! 	    && !(target_flags & MASK_SSE_SET))
! 	  target_flags |= MASK_SSE;
! 	if (processor_alias_table[i].flags & PTA_SSE2
! 	    && !(target_flags & MASK_SSE2_SET))
! 	  target_flags |= MASK_SSE2;
! 	if (processor_alias_table[i].flags & PTA_PREFETCH_SSE)
! 	  x86_prefetch_sse = true;
! 	break;
!       }
  
!   if (i == pta_size)
!     error ("bad value (%s) for -march= switch", ix86_arch_string);
  
!   for (i = 0; i < pta_size; i++)
!     if (! strcmp (ix86_cpu_string, processor_alias_table[i].name))
!       {
! 	ix86_cpu = processor_alias_table[i].processor;
! 	break;
!       }
!   if (processor_alias_table[i].flags & PTA_PREFETCH_SSE)
!     x86_prefetch_sse = true;
!   if (i == pta_size)
!     error ("bad value (%s) for -mcpu= switch", ix86_cpu_string);
  
    if (optimize_size)
      ix86_cost = &size_cost;
diff -Nrc3p i386.oo/i386.h i386/i386.h
*** i386.oo/i386.h	Fri Dec 14 21:38:36 2001
--- i386/i386.h	Fri Dec 14 22:21:56 2001
*************** extern const int x86_add_esp_4, x86_add_
*** 224,229 ****
--- 227,233 ----
  extern const int x86_partial_reg_dependency, x86_memory_mismatch_stall;
  extern const int x86_accumulate_outgoing_args, x86_prologue_using_move;
  extern const int x86_epilogue_using_move, x86_decompose_lea;
+ extern int x86_prefetch_sse;
  
  #define TARGET_USE_LEAVE (x86_use_leave & CPUMASK)
  #define TARGET_PUSH_MEMORY (x86_push_memory & CPUMASK)
*************** extern const int x86_epilogue_using_move
*** 262,267 ****
--- 266,272 ----
  #define TARGET_PROLOGUE_USING_MOVE (x86_prologue_using_move & CPUMASK)
  #define TARGET_EPILOGUE_USING_MOVE (x86_epilogue_using_move & CPUMASK)
  #define TARGET_DECOMPOSE_LEA (x86_decompose_lea & CPUMASK)
+ #define TARGET_PREFETCH_SSE (x86_prefetch_sse)
  
  #define TARGET_STACK_PROBE (target_flags & MASK_STACK_PROBE)
  
*************** extern int ix86_arch;
*** 480,503 ****
  %n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mcpu=pentiumpro' instead.\n}}"
  #endif
  
  #ifndef CPP_CPU_DEFAULT_SPEC
! #if TARGET_CPU_DEFAULT == 1
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_i486__"
  #endif
! #if TARGET_CPU_DEFAULT == 2
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_i586__ -D__tune_pentium__"
  #endif
! #if TARGET_CPU_DEFAULT == 3
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_i686__ -D__tune_pentiumpro__"
  #endif
! #if TARGET_CPU_DEFAULT == 4
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_k6__"
  #endif
! #if TARGET_CPU_DEFAULT == 5
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_athlon__"
  #endif
! #if TARGET_CPU_DEFAULT == 6
! #define CPP_CPU_DEFAULT_SPEC "-D__tune_pentium4__"
  #endif
  #ifndef CPP_CPU_DEFAULT_SPEC
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_i386__"
--- 485,545 ----
  %n`-mpentiumpro' is deprecated. Use `-march=pentiumpro' or `-mcpu=pentiumpro' instead.\n}}"
  #endif
  
+ #define TARGET_CPU_DEFAULT_i386 0
+ #define TARGET_CPU_DEFAULT_i486 1
+ #define TARGET_CPU_DEFAULT_pentium 2
+ #define TARGET_CPU_DEFAULT_pentiumpro 3
+ #define TARGET_CPU_DEFAULT_pentium2 4
+ #define TARGET_CPU_DEFAULT_pentium3 5
+ #define TARGET_CPU_DEFAULT_pentium4 6
+ #define TARGET_CPU_DEFAULT_k6 7
+ #define TARGET_CPU_DEFAULT_k6_2 8
+ #define TARGET_CPU_DEFAULT_k6_3 9
+ #define TARGET_CPU_DEFAULT_athlon 10
+ #define TARGET_CPU_DEFAULT_athlon_sse 11
+ 
+ #define TARGET_CPU_DEFAULT_NAMES {"i386", "i486", "pentium", "pentium-mmx",\
+ 				  "pentiumpro", "pentium2", "pentium3", \
+ 				  "pentium4", "k6", "k6-2", "k6-3",\
+ 				  "athlon", "athlon-4"}
  #ifndef CPP_CPU_DEFAULT_SPEC
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_i486
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_i486__"
  #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_i586__ -D__tune_pentium__"
  #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium_mmx
! #define CPP_CPU_DEFAULT_SPEC "-D__tune_i586__ -D__tune_pentium__ -D__tune_pentium_mmx__"
! #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentiumpro
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_i686__ -D__tune_pentiumpro__"
  #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium2
! #define CPP_CPU_DEFAULT_SPEC "-D__tune_i686__ -D__tune_pentiumpro__\
! -D__tune_pentium2__"
! #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium3
! #define CPP_CPU_DEFAULT_SPEC "-D__tune_i686__ -D__tune_pentiumpro__\
! -D__tune_pentium2__ -D__tune_pentium3__"
! #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_pentium4
! #define CPP_CPU_DEFAULT_SPEC "-D__tune_pentium4__"
! #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_k6
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_k6__"
  #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_k6_2
! #define CPP_CPU_DEFAULT_SPEC "-D__tune_k6__ -D__tune_k6_2__"
! #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_k6_3
! #define CPP_CPU_DEFAULT_SPEC "-D__tune_k6__ -D__tune_k6_3__"
! #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_athlon
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_athlon__"
  #endif
! #if TARGET_CPU_DEFAULT == TARGET_CPU_DEFAULT_athlon_sse
! #define CPP_CPU_DEFAULT_SPEC "-D__tune_athlon__ -D__tune_athlon_sse__"
  #endif
  #ifndef CPP_CPU_DEFAULT_SPEC
  #define CPP_CPU_DEFAULT_SPEC "-D__tune_i386__"
*************** extern int ix86_arch;
*** 531,550 ****
  %{march=i486:-D__i486 -D__i486__ %{!mcpu*:-D__tune_i486__ }}\
  %{march=pentium|march=i586:-D__i586 -D__i586__ -D__pentium -D__pentium__ \
    %{!mcpu*:-D__tune_i586__ -D__tune_pentium__ }}\
  %{march=pentiumpro|march=i686:-D__i686 -D__i686__ \
    -D__pentiumpro -D__pentiumpro__ \
    %{!mcpu*:-D__tune_i686__ -D__tune_pentiumpro__ }}\
  %{march=k6:-D__k6 -D__k6__ %{!mcpu*:-D__tune_k6__ }}\
! %{march=athlon:-D__athlon -D__athlon__ %{!mcpu*:-D__tune_athlon__ }}\
  %{march=pentium4:-D__pentium4 -D__pentium4__ %{!mcpu*:-D__tune_pentium4__ }}\
  %{m386|mcpu=i386:-D__tune_i386__ }\
  %{m486|mcpu=i486:-D__tune_i486__ }\
  %{mpentium|mcpu=pentium|mcpu=i586|mcpu=pentium-mmx:-D__tune_i586__ -D__tune_pentium__ }\
! %{mpentiumpro|mcpu=pentiumpro|mcpu=i686|cpu=pentium2|cpu=pentium3:-D__tune_i686__\
  -D__tune_pentiumpro__ }\
  %{mcpu=k6|mcpu=k6-2|mcpu=k6-3:-D__tune_k6__ }\
  %{mcpu=athlon|mcpu=athlon-tbird|mcpu=athlon-4|mcpu=athlon-xp|mcpu=athlon-mp:\
  -D__tune_athlon__ }\
  %{mcpu=pentium4:-D__tune_pentium4__ }\
  %{march=march=athlon-tbird|march=athlon-xp|march=athlon-mp|march=pentium3|march=pentium4:\
  -D__SSE__ }\
--- 573,605 ----
  %{march=i486:-D__i486 -D__i486__ %{!mcpu*:-D__tune_i486__ }}\
  %{march=pentium|march=i586:-D__i586 -D__i586__ -D__pentium -D__pentium__ \
    %{!mcpu*:-D__tune_i586__ -D__tune_pentium__ }}\
+ %{march=pentium-mmx:-D__i586 -D__i586__ -D__pentium -D__pentium__ \
+   -D__pentium__mmx__ \
+   %{!mcpu*:-D__tune_i586__ -D__tune_pentium__ -D__tune_pentium_mmx__}}\
  %{march=pentiumpro|march=i686:-D__i686 -D__i686__ \
    -D__pentiumpro -D__pentiumpro__ \
    %{!mcpu*:-D__tune_i686__ -D__tune_pentiumpro__ }}\
  %{march=k6:-D__k6 -D__k6__ %{!mcpu*:-D__tune_k6__ }}\
! %{march=k6-2:-D__k6 -D__k6__ -D__k6_2__ \
!   %{!mcpu*:-D__tune_k6__ -D__tune_k6_2__ }}\
! %{march=k6-3:-D__k6 -D__k6__ -D__k6_3__ \
!   %{!mcpu*:-D__tune_k6__ -D__tune_k6_3__ }}\
! %{march=athlon|march=athlon-tbird:-D__athlon -D__athlon__ \
!   %{!mcpu*:-D__tune_athlon__ }}\
! %{march=athlon-4|march=athlon-xp|march=athlon-mp:-D__athlon -D__athlon__ \
!   -D__athlon_sse__ \
!   %{!mcpu*:-D__tune_athlon__ -D__tune_athlon_sse__ }}\
  %{march=pentium4:-D__pentium4 -D__pentium4__ %{!mcpu*:-D__tune_pentium4__ }}\
  %{m386|mcpu=i386:-D__tune_i386__ }\
  %{m486|mcpu=i486:-D__tune_i486__ }\
  %{mpentium|mcpu=pentium|mcpu=i586|mcpu=pentium-mmx:-D__tune_i586__ -D__tune_pentium__ }\
! %{mpentiumpro|mcpu=pentiumpro|mcpu=i686|cpu=pentium2|cpu=pentium3:-D__tune_i686__ \
  -D__tune_pentiumpro__ }\
  %{mcpu=k6|mcpu=k6-2|mcpu=k6-3:-D__tune_k6__ }\
  %{mcpu=athlon|mcpu=athlon-tbird|mcpu=athlon-4|mcpu=athlon-xp|mcpu=athlon-mp:\
  -D__tune_athlon__ }\
+ %{mcpu=athlon-4|mcpu=athlon-xp|mcpu=athlon-mp:\
+ -D__tune_athlon_sse__ }\
  %{mcpu=pentium4:-D__tune_pentium4__ }\
  %{march=march=athlon-tbird|march=athlon-xp|march=athlon-mp|march=pentium3|march=pentium4:\
  -D__SSE__ }\
*************** march=athlon|march=athlon-tbird|march=at
*** 554,560 ****
  %{march=k6|march=k6-2|march=k6-3\
  march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\
  |march=athlon-mp: -D__3dNOW__ }\
! %{mcpu=mcpu=pentium4: -D__SSE2__ }\
  %{!march*:%{!mcpu*:%{!m386:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}}}"
  
  #ifndef CPP_CPU_SPEC
--- 609,617 ----
  %{march=k6|march=k6-2|march=k6-3\
  march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\
  |march=athlon-mp: -D__3dNOW__ }\
! %{march=athlon|march=athlon-tbird|march=athlon-4|march=athlon-xp\
! |march=athlon-mp: -D__3dNOW_A__ }\
! %{march=mcpu=pentium4: -D__SSE2__ }\
  %{!march*:%{!mcpu*:%{!m386:%{!m486:%{!mpentium*:%(cpp_cpu_default)}}}}}"
  
  #ifndef CPP_CPU_SPEC
Index: config.gcc
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config.gcc,v
retrieving revision 1.128
diff -c -3 -p -r1.128 config.gcc
*** config.gcc	2001/12/13 00:27:30	1.128
--- config.gcc	2001/12/13 20:47:59
*************** esac
*** 3275,3301 ****
  target_cpu_default2=
  case $machine in
  i486-*-*)
! 	target_cpu_default2=1
  	;;
  i586-*-*)
  	case $target_alias in
  		k6-*)
! 			target_cpu_default2=4
  			;;
  		*)
! 			target_cpu_default2=2
  			;;
  	esac
  	;;
  i686-*-* | i786-*-*)
  	case $target_alias in
! 		athlon-*)
! 			target_cpu_default2=5
  			;;
  		*)
! 			target_cpu_default2=3
  			;;
  	esac
  	;;
  alpha*-*-*)
  	case $machine in
--- 3275,3325 ----
  target_cpu_default2=
  case $machine in
  i486-*-*)
! 	target_cpu_default2=TARGET_CPU_DEFAULT_i486
  	;;
  i586-*-*)
  	case $target_alias in
+ 		k6_2-*)
+ 			target_cpu_default2=TARGET_CPU_DEFAULT_k6-2
+ 			;;
+ 		k6_3-*)
+ 			target_cpu_default2=TARGET_CPU_DEFAULT_k6-3
+ 			;;
  		k6-*)
! 			target_cpu_default2=TARGET_CPU_DEFAULT_k6
  			;;
  		*)
! 			target_cpu_default2=TARGET_CPU_DEFAULT_pentium
  			;;
  	esac
  	;;
  i686-*-* | i786-*-*)
  	case $target_alias in
! 		athlon_xp-*|athlon_mp-*|athlon_4-*)
! 			target_cpu_default2=TARGET_CPU_DEFAULT_athlon_sse
! 			;;
! 		athlon_tbird-*|athlon-*)
! 			target_cpu_default2=TARGET_CPU_DEFAULT_athlon
! 			;;
! 		pentium2-*)
! 			target_cpu_default2=TARGET_CPU_DEFAULT_pentium2
  			;;
+ 		pentium3-*)
+ 			target_cpu_default2=TARGET_CPU_DEFAULT_pentium3
+ 			;;
+ 		pentium4-*)
+ 			target_cpu_default2=TARGET_CPU_DEFAULT_pentium4
+ 			;;
  		*)
! 			target_cpu_default2=TARGET_CPU_DEFAULT_pentiumpro
  			;;
  	esac
+ 	;;
+ x86_64-*-*)
+ 	# We should have hammer chip here, but it does not exist yet and
+ 	# thus it is not supported.  Athlon_SSE is probably equivalent feature
+ 	# wise to hammer from our point of view except for 64bit mode.
+ 	target_cpu_default2=TARGET_CPU_DEFAULT_athlon_sse
  	;;
  alpha*-*-*)
  	case $machine in


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