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Re: recognize x86 CPU variants and default SSE/MMX/3dNOW support


> On Tue, Dec 11, 2001 at 11:30:25AM +0100, Jan Hubicka wrote:
> > this patch adds the support for the CPU variants as discussed earlier.
> 
> We can't do this until SSE math is moved to a different switch.

What is wrong with defaulting to SSE math on these CPUs?  It is faster so I
believe it is similar as when we enable conditional moves or other use of given
architecture.  We probably can have switch for backward compatibility with
i386 80bit temporaries, but I would still like to see SSE math to default
on SSE, mainly SSE2 enabled chips.

I can prepare the patch today or tomorrow. The obstacke is that we do use
constraint letter for SSE that disappears if SSE is not present, so for SSE
match we will need to invent yet another letter.

Sound sane?
Honza
> 
> >     { "mmx",			 MASK_MMX, N_("Support MMX builtins") },      \
> > !   { "no-mmx",			-MASK_MMX,			      \
> 
> Not right.  See no-aix-struct-return in rs6000.h.
> 
> > + %{mcpu=mcpu=pentium4: -D__SSE2__ }\
> 
> Duplicate.
> 
> 
> r~


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