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Web pass take III
Hi,
here is the patch with documentation added.
I didn't changed any code, so I've just verified that info files
builds after patch.
Previous version bootstrapped/regtested i386/sparc/mips.
Thu Nov 22 17:49:30 CET 2001 Jan Hubicka <jh@suse.cz>
* Makefile.in (web.o): New.
* rtl.h (web_main): Declare.
* timevar.def (TV_WEB): New.
* toplev.c (dump_file_index): Add DFI_web.
(dump_file_info): Add web.
(flag_web): New.
(f_options): Add "web".
(rest_of_compilation): Call web_main.
(parse_options_and_default_flags): Enable -fweb on -O3.
* web.c: New file.
* invoke.texi: (-fweb, -dZ): Document.
(-O3): Document that -fweb is enabled.
* passes.texi (web construction pass): Document.
Index: Makefile.in
===================================================================
RCS file: /cvs/gcc/egcs/gcc/Makefile.in,v
retrieving revision 1.787
diff -c -3 -p -r1.787 Makefile.in
*** Makefile.in 2001/11/22 02:32:52 1.787
--- Makefile.in 2001/11/22 16:06:35
*************** OBJS = alias.o bb-reorder.o bitmap.o bui
*** 747,753 ****
sibcall.o simplify-rtx.o splay-tree.o ssa.o ssa-ccp.o ssa-dce.o stmt.o \
stor-layout.o stringpool.o timevar.o toplev.o tree.o tree-dump.o \
tree-inline.o unroll.o varasm.o varray.o version.o xcoffout.o \
! cfglayout.o \
$(GGC) $(out_object_file) $(EXTRA_OBJS)
BACKEND = main.o libbackend.a
--- 747,753 ----
sibcall.o simplify-rtx.o splay-tree.o ssa.o ssa-ccp.o ssa-dce.o stmt.o \
stor-layout.o stringpool.o timevar.o toplev.o tree.o tree-dump.o \
tree-inline.o unroll.o varasm.o varray.o version.o xcoffout.o \
! cfglayout.o web.o \
$(GGC) $(out_object_file) $(EXTRA_OBJS)
BACKEND = main.o libbackend.a
*************** cse.o : cse.c $(CONFIG_H) $(SYSTEM_H) $(
*** 1468,1473 ****
--- 1468,1475 ----
gcse.o : gcse.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) $(REGS_H) hard-reg-set.h \
flags.h real.h insn-config.h ggc.h $(RECOG_H) $(EXPR_H) $(BASIC_BLOCK_H) \
function.h output.h toplev.h $(TM_P_H) $(PARAMS_H)
+ web.o : web.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) hard-reg-set.h \
+ flags.h $(BASIC_BLOCK_H) function.h output.h df.h
sibcall.o : sibcall.c $(CONFIG_H) $(SYSTEM_H) $(RTL_H) $(REGS_H) function.h \
hard-reg-set.h flags.h insn-config.h $(RECOG_H) $(BASIC_BLOCK_H)
resource.o : resource.c $(CONFIG_H) $(RTL_H) hard-reg-set.h $(SYSTEM_H) \
Index: rtl.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/rtl.h,v
retrieving revision 1.315
diff -c -3 -p -r1.315 rtl.h
*** rtl.h 2001/11/21 23:41:40 1.315
--- rtl.h 2001/11/22 16:06:35
*************** extern rtx expand_mult_highpart PARAMS
*** 1921,1926 ****
--- 1921,1929 ----
extern int gcse_main PARAMS ((rtx, FILE *));
#endif
+ /* In web.c */
+ extern void web_main PARAMS ((void));
+
/* In global.c */
extern void mark_elimination PARAMS ((int, int));
#ifdef BUFSIZ
Index: timevar.def
===================================================================
RCS file: /cvs/gcc/egcs/gcc/timevar.def,v
retrieving revision 1.12
diff -c -3 -p -r1.12 timevar.def
*** timevar.def 2001/10/20 10:03:52 1.12
--- timevar.def 2001/11/22 16:06:35
*************** DEFTIMEVAR (TV_EXPAND , "expand")
*** 54,59 ****
--- 54,60 ----
DEFTIMEVAR (TV_VARCONST , "varconst")
DEFTIMEVAR (TV_INTEGRATION , "integration")
DEFTIMEVAR (TV_JUMP , "jump")
+ DEFTIMEVAR (TV_WEB , "web construction")
DEFTIMEVAR (TV_CSE , "CSE")
DEFTIMEVAR (TV_GCSE , "global CSE")
DEFTIMEVAR (TV_LOOP , "loop analysis")
Index: toplev.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/toplev.c,v
retrieving revision 1.542
diff -c -3 -p -r1.542 toplev.c
*** toplev.c 2001/11/20 10:16:09 1.542
--- toplev.c 2001/11/22 16:06:37
*************** enum dump_file_index
*** 242,247 ****
--- 242,248 ----
DFI_ssa_ccp,
DFI_ssa_dce,
DFI_ussa,
+ DFI_web,
DFI_cse,
DFI_addressof,
DFI_gcse,
*************** enum dump_file_index
*** 275,281 ****
Remaining -d letters:
" o q u "
! " H JK OPQ TUV YZ"
*/
struct dump_file_info dump_file[DFI_MAX] =
--- 276,282 ----
Remaining -d letters:
" o q u "
! " H JK OPQ TUV Y "
*/
struct dump_file_info dump_file[DFI_MAX] =
*************** struct dump_file_info dump_file[DFI_MAX]
*** 288,293 ****
--- 289,295 ----
{ "ssaccp", 'W', 1, 0, 0 },
{ "ssadce", 'X', 1, 0, 0 },
{ "ussa", 'e', 1, 0, 0 }, /* Yes, duplicate enable switch. */
+ { "web", 'Z', 0, 0, 0 },
{ "cse", 's', 0, 0, 0 },
{ "addressof", 'F', 0, 0, 0 },
{ "gcse", 'G', 1, 0, 0 },
*************** int flag_syntax_only = 0;
*** 640,645 ****
--- 642,650 ----
static int flag_gcse;
+ /* Nonzero means performs web construction pass. */
+ static int flag_web;
+
/* Nonzero means to use global dataflow analysis to eliminate
useless null pointer tests. */
*************** lang_independent_options f_options[] =
*** 1049,1054 ****
--- 1054,1061 ----
N_("Return 'short' aggregates in registers") },
{"delayed-branch", &flag_delayed_branch, 1,
N_("Attempt to fill delay slots of branch instructions") },
+ {"web", &flag_web, 1,
+ N_("Construct webs and split unrelated uses of single variable") },
{"gcse", &flag_gcse, 1,
N_("Perform the global common subexpression elimination") },
{"gcse-lm", &flag_gcse_lm, 1,
*************** rest_of_compilation (decl)
*** 2687,2692 ****
if (optimize > 0)
{
find_basic_blocks (insns, max_reg_num (), rtl_dump_file);
! cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_PRE_LOOP);
/* ??? Run if-conversion before delete_null_pointer_checks,
since the later does not preserve the CFG. This should
--- 2694,2716 ----
if (optimize > 0)
{
find_basic_blocks (insns, max_reg_num (), rtl_dump_file);
! if (rtl_dump_file)
! dump_flow_info (rtl_dump_file);
! cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_PRE_LOOP);
!
! if (flag_web)
! {
! timevar_push (TV_WEB);
! open_dump_file (DFI_web, decl);
!
! web_main ();
! delete_trivially_dead_insns (insns, max_reg_num (), 0);
! cleanup_cfg (CLEANUP_EXPENSIVE | CLEANUP_PRE_LOOP);
!
! close_dump_file (DFI_web, print_rtl_with_bb, insns);
! timevar_pop (TV_WEB);
! }
/* ??? Run if-conversion before delete_null_pointer_checks,
since the later does not preserve the CFG. This should
*************** parse_options_and_default_flags (argc, a
*** 4689,4694 ****
--- 4712,4718 ----
{
flag_inline_functions = 1;
flag_rename_registers = 1;
+ flag_web = 1;
}
if (optimize < 2 || optimize_size)
Index: web.c
===================================================================
RCS file: web.c
diff -N web.c
*** /dev/null Tue May 5 13:32:27 1998
--- web.c Thu Nov 22 08:06:37 2001
***************
*** 0 ****
--- 1,309 ----
+ /* Web construction code for GNU compiler.
+ Contributed by Jan Hubicka
+ Copyright (C) 2001 Free Software Foundation, Inc.
+
+ This file is part of GCC.
+
+ GCC is free software; you can redistribute it and/or modify it under
+ the terms of the GNU General Public License as published by the Free
+ Software Foundation; either version 2, or (at your option) any later
+ version.
+
+ GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+ WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+ for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with GCC; see the file COPYING. If not, write to the Free
+ Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+ 02111-1307, USA. */
+
+ /* Simple optimization pass that splits indepdendent uses of each pseudo
+ increasing effectivity of other optimizations. The optimization can
+ serve as an example of the use of dataflow module.
+
+ TODO
+ - Add code to keep debugging up-to-date after splitting of user variable
+ pseudos. This can be done by remembering all the pseudos used for the
+ variable and use life analysis information before reload to determing
+ wich one of the possible choices is alive and in case more are live,
+ choose one with latest definition.
+
+ Some other optimization passes will benefit from the infrastructure
+ too.
+
+ - We may use profile information and ignore infrequent use for purposes
+ of web unifying inserting the compensation code later to implement full
+ induction variable expansion for loops (currently we expand only if
+ induction is dead afterwards, that is often the case anyway). */
+
+ #include "config.h"
+ #include "system.h"
+ #include "toplev.h"
+
+ #include "rtl.h"
+ #include "hard-reg-set.h"
+ #include "flags.h"
+ #include "basic-block.h"
+ #include "output.h"
+ #include "df.h"
+ #include "function.h"
+
+
+ /* This entry is allocated for each reference in the insn stream. */
+ struct web_entry
+ {
+ /* pointer to the parent in the union/find tree. */
+ struct web_entry *pred;
+ /* Newly assigned register to the entry. Set only for roots. */
+ rtx reg;
+ };
+
+ static struct web_entry *unionfind_root PARAMS ((struct web_entry *));
+ static void unionfind_union PARAMS ((struct web_entry *,
+ struct web_entry *));
+ static void union_defs PARAMS ((struct df *, struct ref *,
+ struct web_entry *,
+ struct web_entry *));
+ static rtx entry_register PARAMS ((struct web_entry *,
+ struct ref *, char *, char *));
+ static void replace_ref PARAMS ((struct ref *, rtx));
+ static int mark_addressof PARAMS ((rtx *, void *));
+
+ /* Find the root of unionfind tree. */
+
+ static struct web_entry *
+ unionfind_root (element)
+ struct web_entry *element;
+ {
+ struct web_entry *element1 = element, *element2;
+
+ while (element->pred)
+ element = element->pred;
+ while (element1->pred)
+ {
+ element2 = element1->pred;
+ element1->pred = element;
+ element1 = element2;
+ }
+ return element;
+ }
+
+ /* Union sets. */
+
+ static void
+ unionfind_union (first, second)
+ struct web_entry *first, *second;
+ {
+ first = unionfind_root (first);
+ second = unionfind_root (second);
+ if (first == second)
+ return;
+ second->pred = first;
+ }
+
+ /* For each use, all possible defs reaching it must come in same register,
+ union them. */
+
+ static void
+ union_defs (df, use, def_entry, use_entry)
+ struct df *df;
+ struct ref *use;
+ struct web_entry *def_entry;
+ struct web_entry *use_entry;
+ {
+ rtx insn = DF_REF_INSN (use);
+ struct df_link *link = DF_REF_CHAIN (use);
+ struct df_link *use_link = DF_INSN_USES (df, insn);
+ struct df_link *def_link = DF_INSN_DEFS (df, insn);
+ rtx set = single_set (insn);
+
+ /* Some instructions may use match_dup for its operands. In case the
+ operands are dead, we will assign them different pseudos creating
+ invalid instruction, so union all uses of the same operands for each
+ insn. */
+
+ while (use_link)
+ {
+ if (use != use_link->ref
+ && DF_REF_REAL_REG (use) == DF_REF_REAL_REG (use_link->ref))
+ unionfind_union (use_entry + DF_REF_ID (use),
+ use_entry + DF_REF_ID (use_link->ref));
+ use_link = use_link->next;
+ }
+
+ /* Recognize trivial noop moves and attempt to keep them noop.
+ While most of noop moves should be removed we still keep some at
+ libcall boundaries and such. */
+
+ if (set
+ && SET_SRC (set) == DF_REF_REG (use)
+ && SET_SRC (set) == SET_DEST (set))
+ {
+ while (def_link)
+ {
+ if (DF_REF_REAL_REG (use) == DF_REF_REAL_REG (def_link->ref))
+ unionfind_union (use_entry + DF_REF_ID (use),
+ def_entry + DF_REF_ID (def_link->ref));
+ def_link = def_link->next;
+ }
+ }
+ while (link)
+ {
+ unionfind_union (use_entry + DF_REF_ID (use),
+ def_entry + DF_REF_ID (link->ref));
+ link = link->next;
+ }
+
+ /* An READ_WRITE use require the corresponding def to be in the same
+ register. Find it and union. */
+ if (use->flags & DF_REF_READ_WRITE)
+ {
+ struct df_link *link = DF_INSN_DEFS (df, DF_REF_INSN (use));
+
+ while (DF_REF_REAL_REG (link->ref) != DF_REF_REAL_REG (use))
+ link = link->next;
+
+ unionfind_union (use_entry + DF_REF_ID (use),
+ def_entry + DF_REF_ID (link->ref));
+ }
+ }
+
+ /* Find corresponding register for given entry. */
+
+ static rtx
+ entry_register (entry, ref, used, use_addressof)
+ struct web_entry *entry;
+ struct ref *ref;
+ char *used;
+ char *use_addressof;
+ {
+ struct web_entry *root;
+ rtx reg, newreg;
+
+ /* Find corresponding web and see if it has been visited. */
+
+ root = unionfind_root (entry);
+ if (root->reg)
+ return root->reg;
+
+ /* We are seeing this web first time, do the assignment. */
+
+ reg = DF_REF_REAL_REG (ref);
+
+ /* In case the original register is already assigned, generate new one. */
+ if (!used[REGNO (reg)])
+ newreg = reg, used[REGNO (reg)] = 1;
+ if (use_addressof [REGNO (reg)])
+ {
+ newreg = reg;
+ if (rtl_dump_file)
+ fprintf (rtl_dump_file,
+ "New web forced to keep reg=%i (address taken)\n",
+ REGNO (reg));
+ }
+ else
+ {
+ newreg = gen_reg_rtx (GET_MODE (reg));
+ REG_USERVAR_P (newreg) = REG_USERVAR_P (reg);
+ REG_POINTER (newreg) = REG_POINTER (reg);
+ REG_LOOP_TEST_P (newreg) = REG_LOOP_TEST_P (reg);
+ RTX_UNCHANGING_P (newreg) = RTX_UNCHANGING_P (reg);
+ REGNO_DECL (REGNO (newreg)) = REGNO_DECL (REGNO (reg));
+ if (rtl_dump_file)
+ fprintf (rtl_dump_file, "Web oldreg=%i newreg=%i\n", REGNO (reg),
+ REGNO (newreg));
+ }
+
+ root->reg = newreg;
+ return newreg;
+ }
+
+ /* Replace the reference by REG. */
+
+ static void
+ replace_ref (ref, reg)
+ struct ref *ref;
+ rtx reg;
+ {
+ rtx oldreg = DF_REF_REAL_REG (ref);
+ rtx *loc = DF_REF_REAL_LOC (ref);
+
+ if (oldreg == reg)
+ return;
+ if (rtl_dump_file)
+ fprintf (rtl_dump_file, "Updating insn %i (%i->%i)\n",
+ INSN_UID (DF_REF_INSN (ref)), REGNO (oldreg), REGNO (reg));
+ *loc = reg;
+ }
+
+ /* Mark each pseudo, whose address is taken. */
+
+ static int
+ mark_addressof (rtl, data)
+ rtx *rtl;
+ void *data;
+ {
+ if (!*rtl)
+ return 0;
+ if (GET_CODE (*rtl) == ADDRESSOF
+ && REG_P (XEXP (*rtl, 0)))
+ ((char *)data)[REGNO (XEXP (*rtl, 0))] = 1;
+ return 0;
+ }
+
+ /* Main entry point. */
+
+ void
+ web_main ()
+ {
+ struct df *df;
+ struct web_entry *def_entry;
+ struct web_entry *use_entry;
+ unsigned int i;
+ int max = max_reg_num ();
+ char *used;
+ char *use_addressof;
+ rtx insn;
+
+ df = df_init ();
+ df_analyse (df, 0, DF_UD_CHAIN | DF_EQUIV_NOTES);
+
+ def_entry =
+ (struct web_entry *) xcalloc (df->n_defs, sizeof (struct web_entry));
+ use_entry =
+ (struct web_entry *) xcalloc (df->n_uses, sizeof (struct web_entry));
+ used = (char *) xcalloc (max, sizeof (char));
+ use_addressof = (char *) xcalloc (max, sizeof (char));
+
+ if (rtl_dump_file)
+ df_dump (df, DF_UD_CHAIN | DF_DU_CHAIN, rtl_dump_file);
+
+ /* Produce the web. */
+ for (i = 0; i < df->n_uses; i++)
+ union_defs (df, df->uses[i], def_entry, use_entry);
+
+ /* We can not safely rename registers whose address is taken. */
+ for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
+ if (INSN_P (insn))
+ for_each_rtx (&PATTERN (insn), mark_addressof, use_addressof);
+
+ /* Update the instruction stream, allocating new registers for split pseudos
+ in progress. */
+ for (i = 0; i < df->n_uses; i++)
+ replace_ref (df->uses[i], entry_register (use_entry + i, df->uses[i],
+ used, use_addressof));
+ for (i = 0; i < df->n_defs; i++)
+ replace_ref (df->defs[i], entry_register (def_entry + i, df->defs[i],
+ used, use_addressof));
+
+ /* Dataflow information is corrupt here, but it can be easy to update it
+ by creating new entries for new registers and update or calilng
+ df_insns_modify. */
+ free (def_entry);
+ free (use_entry);
+ free (used);
+ free (use_addressof);
+ df_finish (df);
+ }
Index: invoke.texi
===================================================================
RCS file: /cvs/gcc/egcs/gcc/doc/invoke.texi,v
retrieving revision 1.75.2.1
diff -c -3 -p -r1.75.2.1 invoke.texi
*** invoke.texi 2001/11/22 16:05:20 1.75.2.1
--- invoke.texi 2001/11/23 13:35:09
*************** in the following sections.
*** 278,284 ****
-fschedule-insns -fschedule-insns2 @gol
-fsingle-precision-constant -fssa -fssa-ccp -fssa-dce @gol
-fstrength-reduce -fstrict-aliasing -fthread-jumps -ftrapv @gol
! -funroll-all-loops -funroll-loops @gol
--param @var{name}=@var{value}
-O -O0 -O1 -O2 -O3 -Os}
--- 278,284 ----
-fschedule-insns -fschedule-insns2 @gol
-fsingle-precision-constant -fssa -fssa-ccp -fssa-dce @gol
-fstrength-reduce -fstrict-aliasing -fthread-jumps -ftrapv @gol
! -funroll-all-loops -funroll-loops -fweb @gol
--param @var{name}=@var{value}
-O -O0 -O1 -O2 -O3 -Os}
*************** Here are the possible letters for use in
*** 2902,2920 ****
Annotate the assembler output with miscellaneous debugging information.
@item b
@opindex db
! Dump after computing branch probabilities, to @file{@var{file}.14.bp}.
@item B
@opindex dB
! Dump after block reordering, to @file{@var{file}.28.bbro}.
@item c
@opindex dc
! Dump after instruction combination, to the file @file{@var{file}.16.combine}.
@item C
@opindex dC
! Dump after the first if conversion, to the file @file{@var{file}.17.ce}.
@item d
@opindex dd
! Dump after delayed branch scheduling, to @file{@var{file}.31.dbr}.
@item D
@opindex dD
Dump all macro definitions, at the end of preprocessing, in addition to
--- 2902,2920 ----
Annotate the assembler output with miscellaneous debugging information.
@item b
@opindex db
! Dump after computing branch probabilities, to @file{@var{file}.15.bp}.
@item B
@opindex dB
! Dump after block reordering, to @file{@var{file}.29.bbro}.
@item c
@opindex dc
! Dump after instruction combination, to the file @file{@var{file}.17.combine}.
@item C
@opindex dC
! Dump after the first if conversion, to the file @file{@var{file}.18.ce}.
@item d
@opindex dd
! Dump after delayed branch scheduling, to @file{@var{file}.32.dbr}.
@item D
@opindex dD
Dump all macro definitions, at the end of preprocessing, in addition to
*************** Dump after SSA optimizations, to @file{@
*** 2925,2931 ****
@file{@var{file}.07.ussa}.
@item E
@opindex dE
! Dump after the second if conversion, to @file{@var{file}.26.ce2}.
@item f
@opindex df
Dump after life analysis, to @file{@var{file}.15.life}.
--- 2925,2931 ----
@file{@var{file}.07.ussa}.
@item E
@opindex dE
! Dump after the second if conversion, to @file{@var{file}.27.ce2}.
@item f
@opindex df
Dump after life analysis, to @file{@var{file}.15.life}.
*************** Dump after global register allocation, t
*** 2940,2949 ****
Dump after finalization of EH handling code, to @file{@var{file}.02.eh}.
@item o
@opindex do
! Dump after post-reload optimizations, to @file{@var{file}.22.postreload}.
@item G
@opindex dG
! Dump after GCSE, to @file{@var{file}.10.gcse}.
@item i
@opindex di
Dump after sibling call optimizations, to @file{@var{file}.01.sibling}.
--- 2940,2949 ----
Dump after finalization of EH handling code, to @file{@var{file}.02.eh}.
@item o
@opindex do
! Dump after post-reload optimizations, to @file{@var{file}.23.postreload}.
@item G
@opindex dG
! Dump after GCSE, to @file{@var{file}.11.gcse}.
@item i
@opindex di
Dump after sibling call optimizations, to @file{@var{file}.01.sibling}.
*************** Dump after conversion from registers to
*** 2958,2974 ****
Dump after local register allocation, to @file{@var{file}.20.lreg}.
@item L
@opindex dL
! Dump after loop optimization, to @file{@var{file}.11.loop}.
@item M
@opindex dM
Dump after performing the machine dependent reorganisation pass, to
! @file{@var{file}.30.mach}.
@item n
@opindex dn
Dump after register renumbering, to @file{@var{file}.25.rnreg}.
@item N
@opindex dN
! Dump after the register move pass, to @file{@var{file}.18.regmove}.
@item r
@opindex dr
Dump after RTL generation, to @file{@var{file}.00.rtl}.
--- 2958,2974 ----
Dump after local register allocation, to @file{@var{file}.20.lreg}.
@item L
@opindex dL
! Dump after loop optimization, to @file{@var{file}.12.loop}.
@item M
@opindex dM
Dump after performing the machine dependent reorganisation pass, to
! @file{@var{file}.31.mach}.
@item n
@opindex dn
Dump after register renumbering, to @file{@var{file}.25.rnreg}.
@item N
@opindex dN
! Dump after the register move pass, to @file{@var{file}.19.regmove}.
@item r
@opindex dr
Dump after RTL generation, to @file{@var{file}.00.rtl}.
*************** Dump after CSE (including the jump optim
*** 2981,2987 ****
CSE), to @file{@var{file}.08.cse}.
@item S
@opindex dS
! Dump after the first scheduling pass, to @file{@var{file}.19.sched}.
@item t
@opindex dt
Dump after the second CSE pass (including the jump optimization that
--- 2981,2987 ----
CSE), to @file{@var{file}.08.cse}.
@item S
@opindex dS
! Dump after the first scheduling pass, to @file{@var{file}.21.sched}.
@item t
@opindex dt
Dump after the second CSE pass (including the jump optimization that
*************** Dump after the second flow pass, to @fil
*** 2994,3000 ****
Dump after SSA dead code elimination, to @file{@var{file}.06.ssadce}.
@item z
@opindex dz
! Dump after the peephole pass, to @file{@var{file}.24.peephole2}.
@item a
@opindex da
Produce all the dumps listed above.
--- 2994,3000 ----
Dump after SSA dead code elimination, to @file{@var{file}.06.ssadce}.
@item z
@opindex dz
! Dump after the peephole pass, to @file{@var{file}.25.peephole2}.
@item a
@opindex da
Produce all the dumps listed above.
*************** with @samp{r}.
*** 3024,3029 ****
--- 3024,3032 ----
@opindex dy
Dump debugging information during parsing, to standard error.
@end table
+ @item Z
+ @opindex dZ
+ Dump after web construction pass, to @file{@var{file}.10.web}.
@item -fdump-unnumbered
@opindex fdump-unnumbered
*************** invoking @option{-O2} on programs that u
*** 3218,3225 ****
@item -O3
@opindex O3
Optimize yet more. @option{-O3} turns on all optimizations specified by
! @option{-O2} and also turns on the @option{-finline-functions} and
! @option{-frename-registers} options.
@item -O0
@opindex O0
--- 3221,3228 ----
@item -O3
@opindex O3
Optimize yet more. @option{-O3} turns on all optimizations specified by
! @option{-O2} and also turns on the @option{-finline-functions}, @option{-fweb}
! and @option{-frename-registers} options.
@item -O0
@opindex O0
*************** of registers left over after register al
*** 3829,3834 ****
--- 3832,3846 ----
will most benefit processors with lots of registers. It can, however,
make debugging impossible, since variables will no longer stay in
a ``home register''.
+
+ @item -fweb
+ @opindex fweb
+ Constructs webs as commonly used for register allocation purposes and assign
+ each web individual pseudo register. This allows our register allocation pass
+ to operate on pseudos directly, but also strengthens several other optimization
+ passes, such as CSE, loop optimizer and trivial dead code remover. It can,
+ however, make debugging impossible, since variables will no longer stay in a
+ ``home register''.
@item --param @var{name}=@var{value}
@opindex param
Index: passes.texi
===================================================================
RCS file: /cvs/gcc/egcs/gcc/doc/passes.texi,v
retrieving revision 1.1.2.1
diff -c -3 -p -r1.1.2.1 passes.texi
*** passes.texi 2001/11/22 16:05:20 1.1.2.1
--- passes.texi 2001/11/23 13:35:09
*************** this pass. This dump file's name is mad
*** 318,323 ****
--- 318,338 ----
the input file name.
@end itemize
+ @cindex web
+ @cindex web construction pass
+ @opindex fweb
+ @item
+ This pass constructs webs as commonly used for register allocation purposes.
+ After that each web gets assigned individual pseudo. This allows our register
+ allocation pass to operate on pseudos directly, but also strengthens several
+ other optimization passes, such as CSE, loop optimizer and trivial dead code
+ remover.
+
+ @opindex dZ
+ The option @option{-dZ} causes a debugging dump of the RTL code after
+ this pass. This dump file's name is made by appending @samp{.web} to
+ the input file name.
+
@cindex common subexpression elimination
@cindex constant propagation
@item