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leftouts of x86_64 merger
- To: gcc-patches at gcc dot gnu dot org, rth at cygnus dot com, patches at x86-64 dot org
- Subject: leftouts of x86_64 merger
- From: Jan Hubicka <jh at suse dot cz>
- Date: Thu, 4 Oct 2001 16:12:52 +0200
Hi,
this patch contains assorted fixes. Together with previous patches these are needed
to allow gcc build glibc and pass regression testing on x86_64.
Bootstrapped/regtested i686, regtested x86_64
Honza
Thu Oct 4 14:40:10 CEST 2001 Jan Hubicka <jh@suse.cz>
* i386.c (ix86_setup_incomming_varargs): Fix mode of PLUS.
(ix86_expand_move): Avoid pushes of memory if size does not match;
move long constants to register.
(x86_initialize_trampoline): Fix mode.
* i386.h (ASM_OUTPUT_ADDR_VEC_ELT, ASM_OUTPUT_ADDR_DIFF_ELT):
Use ASM_QUAD on 64bit.
* i386.md (test pattern): Disallow impossible constants.
(tablejump PIC expander): Fix emitting of sum.
(movdicc_rex64): Rename to movdicc.
* linux64.h (LINK_SPEC): Add missing '%'.
Index: config/i386/i386.c
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.c,v
retrieving revision 1.314
diff -c -3 -p -r1.314 i386.c
*** i386.c 2001/10/02 10:59:38 1.314
--- i386.c 2001/10/04 12:14:57
*************** ix86_setup_incoming_varargs (cum, mode,
*** 2204,2210 ****
nsse_reg = gen_reg_rtx (Pmode);
emit_insn (gen_zero_extendqidi2 (nsse_reg, gen_rtx_REG (QImode, 0)));
emit_insn (gen_rtx_SET (VOIDmode, tmp_reg,
! gen_rtx_MULT (VOIDmode, nsse_reg,
GEN_INT (4))));
if (next_cum.sse_regno)
emit_move_insn
--- 2221,2227 ----
nsse_reg = gen_reg_rtx (Pmode);
emit_insn (gen_zero_extendqidi2 (nsse_reg, gen_rtx_REG (QImode, 0)));
emit_insn (gen_rtx_SET (VOIDmode, tmp_reg,
! gen_rtx_MULT (Pmode, nsse_reg,
GEN_INT (4))));
if (next_cum.sse_regno)
emit_move_insn
*************** ix86_expand_move (mode, operands)
*** 6613,6619 ****
else
{
if (GET_CODE (operands[0]) == MEM
! && (GET_MODE (operands[0]) == QImode
|| !push_operand (operands[0], mode))
&& GET_CODE (operands[1]) == MEM)
operands[1] = force_reg (mode, operands[1]);
--- 6654,6660 ----
else
{
if (GET_CODE (operands[0]) == MEM
! && (PUSH_ROUNDING (GET_MODE_SIZE (mode)) != GET_MODE_SIZE (mode)
|| !push_operand (operands[0], mode))
&& GET_CODE (operands[1]) == MEM)
operands[1] = force_reg (mode, operands[1]);
*************** ix86_expand_move (mode, operands)
*** 6622,6627 ****
--- 6663,6677 ----
&& ! general_no_elim_operand (operands[1], mode))
operands[1] = copy_to_mode_reg (mode, operands[1]);
+ /* Force large constants in 64bit compilation into register
+ to get them CSEed. */
+ if (TARGET_64BIT && mode == DImode
+ && immediate_operand (operands[1], mode)
+ && !x86_64_zero_extended_value (operands[1])
+ && !register_operand (operands[0], mode)
+ && optimize && !reload_completed && !reload_in_progress)
+ operands[1] = copy_to_mode_reg (mode, operands[1]);
+
if (FLOAT_MODE_P (mode))
{
/* If we are loading a floating point constant to a register,
*************** x86_initialize_trampoline (tramp, fnaddr
*** 10691,10697 ****
emit_move_insn (gen_rtx_MEM (HImode, plus_constant (tramp, offset)),
GEN_INT (trunc_int_for_mode (0xff49, HImode)));
emit_move_insn (gen_rtx_MEM (QImode, plus_constant (tramp, offset+2)),
! GEN_INT (trunc_int_for_mode (0xe3, HImode)));
offset += 3;
if (offset > TRAMPOLINE_SIZE)
abort();
--- 10743,10749 ----
emit_move_insn (gen_rtx_MEM (HImode, plus_constant (tramp, offset)),
GEN_INT (trunc_int_for_mode (0xff49, HImode)));
emit_move_insn (gen_rtx_MEM (QImode, plus_constant (tramp, offset+2)),
! GEN_INT (trunc_int_for_mode (0xe3, QImode)));
offset += 3;
if (offset > TRAMPOLINE_SIZE)
abort();
Index: config/i386/i386.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.h,v
retrieving revision 1.207
diff -c -3 -p -r1.207 i386.h
*** i386.h 2001/10/02 10:59:39 1.207
--- i386.h 2001/10/04 12:14:58
*************** do { long l; \
*** 2961,2967 ****
*/
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
! fprintf (FILE, "%s%s%d\n", ASM_LONG, LPREFIX, VALUE)
/* This is how to output an element of a case-vector that is relative.
We don't use these on the 386 yet, because the ATT assembler can't do
--- 2983,2989 ----
*/
#define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
! fprintf (FILE, "%s%s%d\n", TARGET_64BIT ? ASM_QUAD : ASM_LONG, LPREFIX, VALUE)
/* This is how to output an element of a case-vector that is relative.
We don't use these on the 386 yet, because the ATT assembler can't do
*************** do { long l; \
*** 2969,2975 ****
*/
Index: config/i386/i386.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/i386.md,v
retrieving revision 1.298
diff -c -3 -p -r1.298 i386.md
*** i386.md 2001/10/02 10:59:39 1.298
--- i386.md 2001/10/04 12:15:02
***************
*** 8106,8111 ****
--- 8106,8117 ----
(const_int 0)))]
"TARGET_64BIT
&& ix86_match_ccmode (insn, CCNOmode)
+ /* The code bellow cannot deal with constants outside HOST_WIDE_INT. */
+ && INTVAL (operands[1]) + INTVAL (operands[2]) < HOST_BITS_PER_WIDE_INT
+ /* Ensure that resulting mask is zero or sign extended operand. */
+ && (INTVAL (operands[1]) + INTVAL (operands[2]) <= 32
+ || (INTVAL (operands[1]) + INTVAL (operands[2]) == 64
+ && INTVAL (operands[1]) > 32))
&& (GET_MODE (operands[0]) == SImode
|| GET_MODE (operands[0]) == DImode
|| GET_MODE (operands[0]) == HImode
***************
*** 12986,12992 ****
{
if (TARGET_64BIT)
operands[0] = expand_simple_binop (Pmode, PLUS, operands[0],
! operands[1], NULL_RTX, 0,
OPTAB_DIRECT);
else
{
--- 12992,12999 ----
{
if (TARGET_64BIT)
operands[0] = expand_simple_binop (Pmode, PLUS, operands[0],
! gen_rtx_LABEL_REF (Pmode, operands[1]),
! NULL_RTX, 0,
OPTAB_DIRECT);
else
{
***************
*** 15479,15489 ****
;; Conditional move instructions.
! (define_expand "movdicc_rex64"
[(set (match_operand:DI 0 "register_operand" "")
(if_then_else:DI (match_operand 1 "comparison_operator" "")
! (match_operand:DI 2 "x86_64_general_operand" "")
! (match_operand:DI 3 "x86_64_general_operand" "")))]
"TARGET_64BIT"
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;")
--- 15486,15496 ----
;; Conditional move instructions.
! (define_expand "movdicc"
[(set (match_operand:DI 0 "register_operand" "")
(if_then_else:DI (match_operand 1 "comparison_operator" "")
! (match_operand:DI 2 "general_operand" "")
! (match_operand:DI 3 "general_operand" "")))]
"TARGET_64BIT"
"if (!ix86_expand_int_movcc (operands)) FAIL; DONE;")
Index: config/i386/linux64.h
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/i386/linux64.h,v
retrieving revision 1.1
diff -c -3 -p -r1.1 linux64.h
*** linux64.h 2001/10/02 10:59:41 1.1
--- linux64.h 2001/10/04 12:15:02
*************** Boston, MA 02111-1307, USA. */
*** 39,45 ****
done. */
#undef LINK_SPEC
! #define LINK_SPEC "%{!m32:-m elf_x86_64} %{m32:-m elf_i386} {shared:-shared} \
%{!shared: \
%{!static: \
%{rdynamic:-export-dynamic} \
--- 39,45 ----
done. */
#undef LINK_SPEC
! #define LINK_SPEC "%{!m32:-m elf_x86_64} %{m32:-m elf_i386} %{shared:-shared} \
%{!shared: \
%{!static: \
%{rdynamic:-export-dynamic} \