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rs6000 logical_operand
- To: gcc-patches at gcc dot gnu dot org
- Subject: rs6000 logical_operand
- From: David Edelsohn <dje at watson dot ibm dot com>
- Date: Wed, 19 Sep 2001 22:37:12 -0400
Some cleanup to the rs6000 machine description and the first step
to supporting long double on AIX.
David
2001-09-19 Alan Modra <amodra@bigpond.net.au>
David Edelsohn <edelsohn@gnu.org>
Revert:
* config/rs6000/rs6000.c (logical_operand): CONST_INTs are
already sign-extended.
* config/rs6000/aix.h (INIT_TARGET_OPTABS): Define TFmode handlers.
* config/rs6000/rs6000.c (logical_operand): Streamline comparison
with HOST_WIDE_INT.
(rs6000_emit_set_long_const): Avoid unnecessary shift.
(output_profile_hook): Declare label_name const.
* config/rs6000/rs6000.md (boolcsi3, boolcdi3): Change predicates
to match constraints.
Index: aix.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/rs6000/aix.h,v
retrieving revision 1.23
diff -c -p -r1.23 aix.h
*** aix.h 2001/08/09 22:33:29 1.23
--- aix.h 2001/09/13 19:10:09
*************** Boston, MA 02111-1307, USA. */
*** 146,159 ****
/* Define cutoff for using external functions to save floating point. */
#define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63)
! /* Optabs entries for the int->float routines, using the standard
! AIX names. */
#define INIT_TARGET_OPTABS \
do { \
if (! TARGET_POWER2 && ! TARGET_POWERPC && TARGET_HARD_FLOAT) \
{ \
fixdfsi_libfunc = init_one_libfunc (RS6000_ITRUNC); \
fixunsdfsi_libfunc = init_one_libfunc (RS6000_UITRUNC); \
} \
} while (0)
--- 146,175 ----
/* Define cutoff for using external functions to save floating point. */
#define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63)
! /* Optabs entries for the int->float routines and quad FP operations
! using the standard AIX names. */
! #define ADDTF3_LIBCALL "_xlqadd"
! #define DIVTF3_LIBCALL "_xlqdiv"
! #define MULTF3_LIBCALL "_xlqmul"
! #define SUBTF3_LIBCALL "_xlqsub"
!
#define INIT_TARGET_OPTABS \
do { \
if (! TARGET_POWER2 && ! TARGET_POWERPC && TARGET_HARD_FLOAT) \
{ \
fixdfsi_libfunc = init_one_libfunc (RS6000_ITRUNC); \
fixunsdfsi_libfunc = init_one_libfunc (RS6000_UITRUNC); \
+ } \
+ if (TARGET_HARD_FLOAT) \
+ { \
+ add_optab->handlers[(int) TFmode].libfunc \
+ = init_one_libfunc (ADDTF3_LIBCALL); \
+ sub_optab->handlers[(int) TFmode].libfunc \
+ = init_one_libfunc (SUBTF3_LIBCALL); \
+ smul_optab->handlers[(int) TFmode].libfunc \
+ = init_one_libfunc (MULTF3_LIBCALL); \
+ sdiv_optab->handlers[(int) TFmode].libfunc \
+ = init_one_libfunc (DIVTF3_LIBCALL); \
} \
} while (0)
Index: rs6000.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/rs6000/rs6000.c,v
retrieving revision 1.208
diff -c -p -r1.208 rs6000.c
*** rs6000.c 2001/09/10 20:59:35 1.208
--- rs6000.c 2001/09/13 19:10:09
*************** logical_operand (op, mode)
*** 1104,1139 ****
register rtx op;
enum machine_mode mode;
{
! /* an unsigned representation of 'op'. */
! unsigned HOST_WIDE_INT opl, oph;
if (gpc_reg_operand (op, mode))
return 1;
if (GET_CODE (op) == CONST_INT)
! opl = INTVAL (op);
else if (GET_CODE (op) == CONST_DOUBLE)
{
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
! abort();
opl = CONST_DOUBLE_LOW (op);
oph = CONST_DOUBLE_HIGH (op);
!
! if (oph != ((unsigned HOST_WIDE_INT)0
! - ((opl & ((unsigned HOST_WIDE_INT)1
! << (HOST_BITS_PER_WIDE_INT - 1))) != 0)))
return 0;
}
else
return 0;
-
- /* This must really be SImode, not MODE. */
- if (opl != (unsigned HOST_WIDE_INT) trunc_int_for_mode (opl, SImode))
- return 0;
! return ((opl & 0xffff) == 0
! || (opl & ~ (unsigned HOST_WIDE_INT) 0xffff) == 0);
}
/* Return 1 if C is a constant that is not a logical operand (as
--- 1104,1138 ----
register rtx op;
enum machine_mode mode;
{
! HOST_WIDE_INT opl, oph;
if (gpc_reg_operand (op, mode))
return 1;
if (GET_CODE (op) == CONST_INT)
! {
! opl = INTVAL (op) & GET_MODE_MASK (mode);
!
! #if HOST_BITS_PER_WIDE_INT <= 32
! if (GET_MODE_BITSIZE (mode) > HOST_BITS_PER_WIDE_INT && opl < 0)
! return 0;
! #endif
! }
else if (GET_CODE (op) == CONST_DOUBLE)
{
if (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT)
! abort ();
opl = CONST_DOUBLE_LOW (op);
oph = CONST_DOUBLE_HIGH (op);
! if (oph != 0)
return 0;
}
else
return 0;
! return ((opl & ~ (unsigned HOST_WIDE_INT) 0xffff) == 0
! || (opl & ~ (unsigned HOST_WIDE_INT) 0xffff0000) == 0);
}
/* Return 1 if C is a constant that is not a logical operand (as
*************** rs6000_emit_set_long_const (dest, c1, c2
*** 1740,1749 ****
#endif
/* Construct the high word */
! if (d4)
{
emit_move_insn (dest, GEN_INT (d4));
! if (d3)
emit_move_insn (dest,
gen_rtx_PLUS (DImode, dest, GEN_INT (d3)));
}
--- 1739,1748 ----
#endif
/* Construct the high word */
! if (d4 != 0)
{
emit_move_insn (dest, GEN_INT (d4));
! if (d3 != 0)
emit_move_insn (dest,
gen_rtx_PLUS (DImode, dest, GEN_INT (d3)));
}
*************** rs6000_emit_set_long_const (dest, c1, c2
*** 1751,1762 ****
emit_move_insn (dest, GEN_INT (d3));
/* Shift it into place */
! emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32)));
/* Add in the low bits. */
! if (d2)
emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d2)));
! if (d1)
emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d1)));
}
--- 1750,1762 ----
emit_move_insn (dest, GEN_INT (d3));
/* Shift it into place */
! if (d3 != 0 || d4 != 0)
! emit_move_insn (dest, gen_rtx_ASHIFT (DImode, dest, GEN_INT (32)));
/* Add in the low bits. */
! if (d2 != 0)
emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d2)));
! if (d1 != 0)
emit_move_insn (dest, gen_rtx_PLUS (DImode, dest, GEN_INT (d1)));
}
*************** output_profile_hook (labelno)
*** 7834,7840 ****
if (DEFAULT_ABI == ABI_AIX)
{
char buf[30];
! char *label_name;
rtx fun;
labelno += 1;
--- 7834,7840 ----
if (DEFAULT_ABI == ABI_AIX)
{
char buf[30];
! const char *label_name;
rtx fun;
labelno += 1;
Index: rs6000.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/rs6000/rs6000.md,v
retrieving revision 1.125
diff -c -p -r1.125 rs6000.md
*** rs6000.md 2001/08/28 17:26:14 1.125
--- rs6000.md 2001/09/13 19:10:09
***************
*** 2804,2810 ****
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(match_operator:SI 3 "boolean_operator"
[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
! (match_operand:SI 2 "logical_operand" "r")]))]
""
"%q3 %0,%2,%1")
--- 2804,2810 ----
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(match_operator:SI 3 "boolean_operator"
[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
! (match_operand:SI 2 "gpc_reg_operand" "r")]))]
""
"%q3 %0,%2,%1")
***************
*** 2870,2876 ****
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(match_operator:SI 3 "boolean_operator"
[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
! (not:SI (match_operand:SI 2 "logical_operand" "r"))]))]
""
"%q3 %0,%1,%2")
--- 2870,2876 ----
[(set (match_operand:SI 0 "gpc_reg_operand" "=r")
(match_operator:SI 3 "boolean_operator"
[(not:SI (match_operand:SI 1 "gpc_reg_operand" "r"))
! (not:SI (match_operand:SI 2 "gpc_reg_operand" "r"))]))]
""
"%q3 %0,%1,%2")
***************
*** 7129,7135 ****
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(match_operator:DI 3 "boolean_operator"
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
! (match_operand:DI 2 "logical_operand" "r")]))]
"TARGET_POWERPC64"
"%q3 %0,%2,%1")
--- 7129,7135 ----
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(match_operator:DI 3 "boolean_operator"
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
! (match_operand:DI 2 "gpc_reg_operand" "r")]))]
"TARGET_POWERPC64"
"%q3 %0,%2,%1")
***************
*** 7195,7201 ****
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(match_operator:DI 3 "boolean_operator"
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
! (not:DI (match_operand:DI 2 "logical_operand" "r"))]))]
"TARGET_POWERPC64"
"%q3 %0,%1,%2")
--- 7195,7201 ----
[(set (match_operand:DI 0 "gpc_reg_operand" "=r")
(match_operator:DI 3 "boolean_operator"
[(not:DI (match_operand:DI 1 "gpc_reg_operand" "r"))
! (not:DI (match_operand:DI 2 "gpc_reg_operand" "r"))]))]
"TARGET_POWERPC64"
"%q3 %0,%1,%2")