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Re: New ia64 patterns for the combiner
- To: Richard Henderson <rth at redhat dot com>
- Subject: Re: New ia64 patterns for the combiner
- From: Bernd Schmidt <bernds at redhat dot com>
- Date: Wed, 8 Aug 2001 11:03:16 +0100 (BST)
- cc: <gcc-patches at gcc dot gnu dot org>
On Sun, 5 Aug 2001, Richard Henderson wrote:
> On Sun, Aug 05, 2001 at 05:53:08PM +0100, Bernd Schmidt wrote:
> > +(define_insn "*cond_opsi2_internal"
> > +(define_split
>
> Should use define_insn_and_split here, especially with 9 line
> input patterns.
Fixed (I had one pattern and two splitters originally, that's why
it ended up like this).
Tested like the previous patch.
Bernd
* config/ia64/ia64.md (cond_opsi2_internal, cond_opsi2_internal_b):
Turn into define_insn_and_split.
Index: gcc/config/ia64/ia64.md
===================================================================
RCS file: /cvs/cvsfiles/devo/gcc/config/ia64/ia64.md,v
retrieving revision 1.99.8.3
diff -u -p -r1.99.8.3 ia64.md
--- gcc/config/ia64/ia64.md 2001/08/05 17:14:08 1.99.8.3
+++ gcc/config/ia64/ia64.md 2001/08/08 09:42:21
@@ -4481,7 +4481,7 @@
VOIDmode, operands[1], const0_rtx);
}")
-(define_insn "*cond_opsi2_internal"
+(define_insn_and_split "*cond_opsi2_internal"
[(set (match_operand:SI 0 "gr_register_operand" "=r")
(match_operator:SI 5 "condop_operator"
[(if_then_else:SI
@@ -4493,19 +4493,6 @@
(match_operand:SI 4 "gr_register_operand" "r")]))]
""
"#"
- [(set_attr "itanium_class" "ialu")
- (set_attr "predicable" "no")])
-
-(define_split
- [(set (match_operand:SI 0 "gr_register_operand" "")
- (match_operator:SI 5 "condop_operator"
- [(if_then_else:SI
- (match_operator 6 "predicate_operator"
- [(match_operand:BI 1 "register_operand" "")
- (const_int 0)])
- (match_operand:SI 2 "gr_register_operand" "")
- (match_operand:SI 3 "gr_register_operand" ""))
- (match_operand:SI 4 "gr_register_operand" "")]))]
"reload_completed"
[(cond_exec
(match_dup 6)
@@ -4517,9 +4504,12 @@
{
operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[6]) == NE ? EQ : NE,
VOIDmode, operands[1], const0_rtx);
-}")
+}"
+ [(set_attr "itanium_class" "ialu")
+ (set_attr "predicable" "no")])
+
-(define_insn "*cond_opsi2_internal_b"
+(define_insn_and_split "*cond_opsi2_internal_b"
[(set (match_operand:SI 0 "gr_register_operand" "=r")
(match_operator:SI 5 "condop_operator"
[(match_operand:SI 4 "gr_register_operand" "r")
@@ -4531,19 +4521,6 @@
(match_operand:SI 3 "gr_register_operand" "r"))]))]
""
"#"
- [(set_attr "itanium_class" "ialu")
- (set_attr "predicable" "no")])
-
-(define_split
- [(set (match_operand:SI 0 "gr_register_operand" "")
- (match_operator:SI 5 "condop_operator"
- [(match_operand:SI 4 "gr_register_operand" "")
- (if_then_else:SI
- (match_operator 6 "predicate_operator"
- [(match_operand:BI 1 "register_operand" "")
- (const_int 0)])
- (match_operand:SI 2 "gr_register_operand" "")
- (match_operand:SI 3 "gr_register_operand" ""))]))]
"reload_completed"
[(cond_exec
(match_dup 6)
@@ -4555,7 +4532,9 @@
{
operands[7] = gen_rtx_fmt_ee (GET_CODE (operands[6]) == NE ? EQ : NE,
VOIDmode, operands[1], const0_rtx);
-}")
+}"
+ [(set_attr "itanium_class" "ialu")
+ (set_attr "predicable" "no")])
;; ::::::::::::::::::::