This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
SH: Miscellaneous mdfile fixes
- To: amylaar at redhat dot com
- Subject: SH: Miscellaneous mdfile fixes
- From: Andrew Haley <aph at cambridge dot redhat dot com>
- Date: Wed, 18 Jul 2001 15:38:48 +0100 (BST)
- Cc: gcc-patches at gcc dot gnu dot org
Some MD fixes.
The first lot defers some splitters until after reload. Without this
we either end up with illegal RTL or in some cases we generate
incorrect code.
The second lot adds a mode to the unspecs used for position
independent code. Without the appropriate mode combine gets very
confused because it thinks that a register is being loaded with an
operand that has an incompatible mode.
Andrew.
2001-07-18 Andrew Haley <aph@cambridge.redhat.com>
* config/sh/sh.md (ashlsi3_std splitter): Split only after reload.
(ashlsi3_n splitter): Likewise.
(lshrsi3_n splitter): Likewise.
(GOTaddr2picreg): Make const SImode.
(sym_label2reg): Likewise.
(symGOT2reg): Likewise.
(symGOTOFF2reg) Likewise.
(casesi_worker_0): Make unspec SImode.
Index: sh.md
===================================================================
RCS file: /cvs/gcc/gcc/gcc/config/sh/sh.md,v
retrieving revision 1.86
diff -p -2 -c -r1.86 sh.md
*** sh.md 2001/07/04 17:43:18 1.86
--- sh.md 2001/07/18 14:25:06
***************
*** 1655,1658 ****
--- 1655,1659 ----
#"
"TARGET_SH3
+ && reload_completed
&& GET_CODE (operands[2]) == CONST_INT
&& ! CONST_OK_FOR_K (INTVAL (operands[2]))"
***************
*** 1697,1701 ****
(match_operand:SI 2 "const_int_operand" "n")))
(clobber (reg:SI T_REG))]
! ""
[(use (reg:SI R0_REG))]
"
--- 1698,1702 ----
(match_operand:SI 2 "const_int_operand" "n")))
(clobber (reg:SI T_REG))]
! "reload_completed"
[(use (reg:SI R0_REG))]
"
***************
*** 1745,1749 ****
(match_operand:HI 2 "const_int_operand" "n")))
(clobber (reg:SI T_REG))]
! ""
[(use (reg:SI R0_REG))]
"
--- 1746,1750 ----
(match_operand:HI 2 "const_int_operand" "n")))
(clobber (reg:SI T_REG))]
! "reload_completed"
[(use (reg:SI R0_REG))]
"
***************
*** 1905,1909 ****
(match_operand:SI 2 "const_int_operand" "n")))
(clobber (reg:SI T_REG))]
! ""
[(use (reg:SI R0_REG))]
"
--- 1906,1910 ----
(match_operand:SI 2 "const_int_operand" "n")))
(clobber (reg:SI T_REG))]
! "reload_completed"
[(use (reg:SI R0_REG))]
"
***************
*** 3748,3752 ****
(unspec [(const (unspec [(match_dup 1)] UNSPEC_PIC))]
UNSPEC_MOVA))
! (set (match_dup 0) (const (unspec [(match_dup 1)] UNSPEC_PIC)))
(set (match_dup 0) (plus:SI (match_dup 0) (reg:SI R0_REG)))]
"" "
--- 3749,3753 ----
(unspec [(const (unspec [(match_dup 1)] UNSPEC_PIC))]
UNSPEC_MOVA))
! (set (match_dup 0) (const:SI (unspec [(match_dup 1)] UNSPEC_PIC)))
(set (match_dup 0) (plus:SI (match_dup 0) (reg:SI R0_REG)))]
"" "
***************
*** 3779,3783 ****
[(set (match_operand:SI 0 "" "")
(const (minus:SI
! (const (unspec [(match_operand:SI 1 "" "")] UNSPEC_PIC))
(const (plus:SI
(match_operand:SI 2 "" "")
--- 3780,3784 ----
[(set (match_operand:SI 0 "" "")
(const (minus:SI
! (const:SI (unspec [(match_operand:SI 1 "" "")] UNSPEC_PIC))
(const (plus:SI
(match_operand:SI 2 "" "")
***************
*** 3787,3791 ****
(define_expand "symGOT2reg"
[(set (match_operand:SI 0 "" "")
! (const (unspec [(match_operand:SI 1 "" "")] UNSPEC_GOT)))
(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 2)))
(set (match_dup 0) (mem:SI (match_dup 0)))]
--- 3788,3792 ----
(define_expand "symGOT2reg"
[(set (match_operand:SI 0 "" "")
! (const:SI (unspec [(match_operand:SI 1 "" "")] UNSPEC_GOT)))
(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 2)))
(set (match_dup 0) (mem:SI (match_dup 0)))]
***************
*** 3798,3802 ****
(define_expand "symGOTOFF2reg"
[(set (match_operand:SI 0 "" "")
! (const (unspec [(match_operand:SI 1 "" "")] UNSPEC_GOTOFF)))
(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 2)))]
""
--- 3799,3803 ----
(define_expand "symGOTOFF2reg"
[(set (match_operand:SI 0 "" "")
! (const:SI (unspec [(match_operand:SI 1 "" "")] UNSPEC_GOTOFF)))
(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 2)))]
""
***************
*** 3887,3891 ****
(define_insn "casesi_worker_0"
[(set (match_operand:SI 0 "register_operand" "=r,r")
! (unspec [(match_operand 1 "register_operand" "0,r")
(label_ref (match_operand 2 "" ""))] UNSPEC_CASESI))
(clobber (match_scratch:SI 3 "=X,1"))
--- 3888,3892 ----
(define_insn "casesi_worker_0"
[(set (match_operand:SI 0 "register_operand" "=r,r")
! (unspec:SI [(match_operand 1 "register_operand" "0,r")
(label_ref (match_operand 2 "" ""))] UNSPEC_CASESI))
(clobber (match_scratch:SI 3 "=X,1"))
***************
*** 3911,3915 ****
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (unspec [(match_operand 1 "register_operand" "")
(label_ref (match_operand 2 "" ""))] UNSPEC_CASESI))
(clobber (match_scratch:SI 3 ""))
--- 3912,3916 ----
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (unspec:SI [(match_operand 1 "register_operand" "")
(label_ref (match_operand 2 "" ""))] UNSPEC_CASESI))
(clobber (match_scratch:SI 3 ""))
***************
*** 3918,3922 ****
[(set (reg:SI R0_REG) (unspec [(label_ref (match_dup 2))] UNSPEC_MOVA))
(parallel [(set (match_dup 0)
! (unspec [(reg:SI R0_REG) (match_dup 1)
(label_ref (match_dup 2))] UNSPEC_CASESI))
(clobber (match_dup 3))])]
--- 3919,3923 ----
[(set (reg:SI R0_REG) (unspec [(label_ref (match_dup 2))] UNSPEC_MOVA))
(parallel [(set (match_dup 0)
! (unspec:SI [(reg:SI R0_REG) (match_dup 1)
(label_ref (match_dup 2))] UNSPEC_CASESI))
(clobber (match_dup 3))])]