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SH4 ic_cache_invalidate code broken
- To: gcc-patches at gcc dot gnu dot org
- Subject: SH4 ic_cache_invalidate code broken
- From: Alexandre Oliva <aoliva at redhat dot com>
- Date: 03 Jun 2001 14:28:20 -0300
- Organization: GCC Team, Red Hat
It came to my attention that the code currently used to invalidate an
instruction cache line may fail to do so if the cache-replacement
chunk of code is not page-aligned. This patch fixes the problem. I'm
checking it in mainline and GCC 3.0 branch.
Index: gcc/ChangeLog
from Alexandre Oliva <aoliva@redhat.com>
* config/sh/lib1funcs.asm (ic_invalidate): Align the
cache-mirroring sequence. Add nops.
Index: gcc/config/sh/lib1funcs.asm
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/sh/lib1funcs.asm,v
retrieving revision 1.18
diff -u -p -r1.18 lib1funcs.asm
--- gcc/config/sh/lib1funcs.asm 2001/05/17 03:16:12 1.18
+++ gcc/config/sh/lib1funcs.asm 2001/06/03 17:27:27
@@ -1217,18 +1217,23 @@ GLOBAL(ic_invalidate):
ocbwb @r4
mova 0f,r0
mov.w 1f,r1
+/* Compute how many cache lines 0f is away from r4. */
sub r0,r4
and r1,r4
- add #4,r4
+/* Prepare to branch to 0f plus the cache-line offset. */
+ add # 0f - 1f,r4
braf r4
nop
1:
.short 0x1fe0
- nop
+ .p2align 5
+/* This must be aligned to the beginning of a cache line. */
0:
- .rept 2048
+ .rept 256 /* There are 256 cache lines of 32 bytes. */
rts
+ .rept 15
nop
+ .endr
.endr
#endif /* SH4 */
#endif /* L_ic_invalidate */
--
Alexandre Oliva Enjoy Guarana', see http://www.ic.unicamp.br/~oliva/
Red Hat GCC Developer aoliva@{cygnus.com, redhat.com}
CS PhD student at IC-Unicamp oliva@{lsd.ic.unicamp.br, gnu.org}
Free Software Evangelist *Please* write to mailing lists, not to me