Re: Add -mno-branch-likely for mips

[cgd at sibyte dot com (Chris G. Demetriou)]

mrs@windriver.com (Mike Stump) writes:
> > The branch-likely instructions work well for some processor
> > implementations, but extremely poorly for others (basically, it
> > defeats dynamic branch prediction logic).  It's not particularly
> > tied to the MIPS ISA level.  We use it as the default for some
> > libraries, based on the actual silicon we want to target with the
> > best performance.  But again, it's not always going to be consistant
> > wrt. MIPS ISA level.
> 
> I've suggested implementing support for the CPU variants he has in
> mind, and having them select the likely win by cpu type.  I'll see
> what we says to that.

Really, there are two facets to this.

* The (new) MIPS32 and MIPS64 ISAs specify that while "branch likely"
instructions are included in those specifications, they are deprecated
(and allegedly will be removed from some future version).  So, they
should probably be avoided for MIPS32 and MIPS64 entirely.

* If _overused_ on a core with advanced branch prediction hw, they can
decrease the effectiveness of the branch predicion hw (by confusing it
or avoiding it entirely).  (Just a conjecture: if the implementation
avoids the BP hardware for the 'likely' instructions, if truly used
for 'almost certain' branches they may improve BP hardware
effectiveness -- by not polluting the hardware's BP state.  I dunno if
this is really likely, tho.)  My recollection is that in general, gcc
overuses the 'likely' instructions to shrink code size esp. for loops.
Modern BP hardware can often predict loop iteration counts better than
a static 'branch likely' would cause.


So, you want two knobs:

* does the compiler ever use BL.  This would probably be set as:

	* MIPS I - MIPS V:	on

	* MIPS32, MIPS64:	off

	* based on CPU type:	based on ISA implemented by that CPU.

* (if ever use BL) should the compiler use BL only for 'almost
certain' branches (i.e. user has provided strong prediction info,
etc.).  This would probably be set to "off" except for specific CPUs,
to match existing behaviour on existing processors.

Of course, GCC doesn't currently seem to have any real support for
MIPS32 and MIPS64...  (the 'mips64-*' config names are misnomers.
Really they're typically mips3-*...)



chris
--
cgd@broadcom.com				Not speaking for Broadcom!!!