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PATCH: Move REG pointer flag into rtx [was Re: PATCH 2: Re: BOOTSTRAP FAILURE: segementation fault in genattrtab]
- To: law at redhat dot com
- Subject: PATCH: Move REG pointer flag into rtx [was Re: PATCH 2: Re: BOOTSTRAP FAILURE: segementation fault in genattrtab]
- From: "John David Anglin" <dave at hiauly1 dot hia dot nrc dot ca>
- Date: Thu, 23 Nov 2000 13:34:13 -0500 (EST)
- Cc: gcc-bugs at gcc dot gnu dot org, gcc-patches at gcc dot gnu dot org
> I see two independent patches here. You need to separate them.
>
> I don't see how your patch to basereg_operand can work.
>
> Consider what happens when you have two pseudos X & Y where one of them is
> a pointer and one of them is not a pointer and they get assigned to the same
> hard register.
>
> REGNO_POINTER_FLAG (REGNO (X)) == REGNO_POINTER_FLAG (REGNO (Y)) because
> we'd be looking at the pointer flag for the hard register (once reload had
> completed).
>
> That won't work (I tried it a few years ago).
>
>
> To make this work you want the bit indicating if a register is a pointer to
> be put in the REG rtx itself. That way you can just do something like
> REG_POINTER (X) and REG_POINTER (Y).
With the enclosed patch, the pointer flag is moved into the rtx and
the code updated to use the new flag. Generally, this simplified the code.
I didn't change REGNO_POINTER_ALIGN or the underlying structure member it uses.
However, in looking at mark_reg_pointer, it is clear that having the
pointer alignment in the rtx as well would be better. If two pseudos
get assigned to the same hard register, then the alignment is the greater
of the two.
As far as the clean up of the pa machine definition that this allows, I
want to look at whether record_unscaled_index_insn_codes in pa.c is still
needed. I will send at separate patch for the cleanup after I have looked
into this.
The enclosed patch has been tested with bootstraps and checks under i686
linux and hpux 10.20. Please review.
Dave
--
J. David Anglin dave.anglin@nrc.ca
National Research Council of Canada (613) 990-0752 (FAX: 952-6605)
2000-11-22 John David Anglin <dave@hiauly1.hia.nrc.ca>
* function.h (emit_status): Delete member regno_pointer_flag and
rename regno_pointer_flag_length to regno_pointer_align_length.
Delete define for REGNO_POINTER_FLAG.
* integrate.h (inline_remap): Delete member regno_pointer_flag.
Add member x_regno_reg_rtx.
* rtl.h (rtx_def): Use frame_related bit to indicate register is
a pointer in REG expressions. Define REG_POINTER macro.
* alias.c (find_base_value, find_base_term): Use REG_POINTER
instead of REGNO_POINTER_FLAG.
* combine.c (nonzero_bits, num_sign_bit_copies): Likewise.
* emit-rtl.c (gen_reg_rtx): Use regno_pointer_align_length instead
of regno_pointer_flag_length. Remove code which refers to
regno_pointer_flag.
(mark_reg_pointer): Use REG_POINTER.
(free_emit_status): Remove code which refers to regno_pointer_flag.
(init_emit, mark_emit_status): Likewise.
* flow.c (dump_flow_info): Likewise.
* function.c (preserve_temp_slots): Likewise.
* integrate.c (expand_inline_function, copy_rtx_and_substitute):
Use x_regno_reg_rtx instead of regno_pointer_flag for function
pointer determination in map.
* loop.c (strength_reduce, maybe_eliminate_biv_1): Use REG_POINTER.
* predict.c (estimate_probability): Likewise.
* regclass.c (record_address_regs, reg_scan_mark_refs): Likewise.
* unroll.c (unroll_loop): Use x_regno_reg_rtx instead of
regno_pointer_flag for function pointer determination in map.
* convex.h (RTX_COSTS): Don't test regno_pointer_flag and use
REG_POINTER.
* pa.c (hppa_legitimize_address, emit_move_sequence, basereg_operand):
Use REG_POINTER.
(restore_unscaled_index_insn_codes): Revise comment.
--- function.h.orig Fri Oct 13 02:26:26 2000
+++ function.h Wed Nov 22 12:55:57 2000
@@ -97,21 +97,19 @@
int x_last_linenum;
const char *x_last_filename;
- /* A vector indexed by pseudo reg number. The allocated length
- of this vector is regno_pointer_flag_length. Since this
- vector is needed during the expansion phase when the total
- number of registers in the function is not yet known,
- it is copied and made bigger when necessary. */
- char *regno_pointer_flag;
- int regno_pointer_flag_length;
+ /* The length of the regno_pointer_align and x_regno_reg_rtx vectors.
+ Since these vectors are needed during the expansion phase when
+ the total number of registers in the function is not yet known,
+ the vectors are copied and made bigger when necessary. */
+ int regno_pointer_align_length;
/* Indexed by pseudo register number, if nonzero gives the known alignment
- for that pseudo (if regno_pointer_flag is set).
- Allocated in parallel with regno_pointer_flag. */
+ for that pseudo (if REG_POINTER is set in x_regno_reg_rtx).
+ Allocated in parallel with x_regno_reg_rtx. */
unsigned char *regno_pointer_align;
/* Indexed by pseudo register number, gives the rtx for that pseudo.
- Allocated in parallel with regno_pointer_flag. */
+ Allocated in parallel with regno_pointer_align. */
rtx *x_regno_reg_rtx;
};
@@ -122,7 +120,6 @@
#define seq_stack (cfun->emit->sequence_stack)
#define REGNO_POINTER_ALIGN(REGNO) (cfun->emit->regno_pointer_align[REGNO])
-#define REGNO_POINTER_FLAG(REGNO) (cfun->emit->regno_pointer_flag[REGNO])
struct expr_status
{
--- integrate.h.orig Thu May 4 17:15:03 2000
+++ integrate.h Wed Nov 22 13:04:21 2000
@@ -94,8 +94,8 @@
rtvec copy_asm_constraints_vector;
/* Indications for regs being pointers and their alignment. */
- char *regno_pointer_flag;
unsigned char *regno_pointer_align;
+ rtx *x_regno_reg_rtx;
/* The next few fields are used for subst_constants to record the SETs
that it saw. */
--- rtl.h.orig Tue Nov 14 13:29:03 2000
+++ rtl.h Tue Nov 21 15:25:25 2000
@@ -169,6 +169,7 @@
restoring registers in the prologue and epilogue.
1 in a MEM if the MEM refers to a scalar, rather than a member of
an aggregate.
+ 1 in a REG if the register is a pointer.
1 in a SYMBOL_REF if it addresses something in the per-function
constant string pool. */
unsigned frame_related : 1;
@@ -749,6 +750,9 @@
/* 1 in a REG rtx if it corresponds to a variable declared by the user. */
#define REG_USERVAR_P(RTX) ((RTX)->volatil)
+/* 1 in a REG rtx if the register is a pointer. */
+#define REG_POINTER(RTX) ((RTX)->frame_related)
+
/* 1 if the given register REG corresponds to a hard register. */
#define HARD_REGISTER_P(REG) (HARD_REGISTER_NUM_P (REGNO (REG)))
--- alias.c.orig Tue Nov 7 17:49:51 2000
+++ alias.c Wed Nov 22 12:18:26 2000
@@ -680,9 +680,9 @@
/* This might not be necessary anymore:
If either operand is a REG that is a known pointer, then it
is the base. */
- else if (GET_CODE (src_0) == REG && REGNO_POINTER_FLAG (REGNO (src_0)))
+ else if (GET_CODE (src_0) == REG && REG_POINTER (src_0))
return find_base_value (src_0);
- else if (GET_CODE (src_1) == REG && REGNO_POINTER_FLAG (REGNO (src_1)))
+ else if (GET_CODE (src_1) == REG && REG_POINTER (src_1))
return find_base_value (src_1);
return 0;
@@ -1091,10 +1091,10 @@
/* If either operand is known to be a pointer, then use it
to determine the base term. */
- if (REG_P (tmp1) && REGNO_POINTER_FLAG (REGNO (tmp1)))
+ if (REG_P (tmp1) && REG_POINTER (tmp1))
return find_base_term (tmp1);
- if (REG_P (tmp2) && REGNO_POINTER_FLAG (REGNO (tmp2)))
+ if (REG_P (tmp2) && REG_POINTER (tmp2))
return find_base_term (tmp2);
/* Neither operand was known to be a pointer. Go ahead and find the
--- combine.c.orig Tue Nov 7 17:49:51 2000
+++ combine.c Wed Nov 22 12:19:59 2000
@@ -7994,7 +7994,7 @@
/* If pointers extend unsigned and this is a pointer in Pmode, say that
all the bits above ptr_mode are known to be zero. */
if (POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode
- && REGNO_POINTER_FLAG (REGNO (x)))
+ && REG_POINTER (x))
nonzero &= GET_MODE_MASK (ptr_mode);
#endif
@@ -8432,7 +8432,7 @@
/* If pointers extend signed and this is a pointer in Pmode, say that
all the bits above ptr_mode are known to be sign bit copies. */
if (! POINTERS_EXTEND_UNSIGNED && GET_MODE (x) == Pmode && mode == Pmode
- && REGNO_POINTER_FLAG (REGNO (x)))
+ && REG_POINTER (x))
return GET_MODE_BITSIZE (Pmode) - GET_MODE_BITSIZE (ptr_mode) + 1;
#endif
--- emit-rtl.c.orig Fri Nov 10 11:01:13 2000
+++ emit-rtl.c Wed Nov 22 12:33:02 2000
@@ -549,18 +549,14 @@
return gen_rtx_CONCAT (mode, realpart, imagpart);
}
- /* Make sure regno_pointer_flag and regno_reg_rtx are large
- enough to have an element for this pseudo reg number. */
+ /* Make sure regno_pointer_align and regno_reg_rtx are large enough
+ to have an element for this pseudo reg number. */
- if (reg_rtx_no == f->emit->regno_pointer_flag_length)
+ if (reg_rtx_no == f->emit->regno_pointer_align_length)
{
- int old_size = f->emit->regno_pointer_flag_length;
+ int old_size = f->emit->regno_pointer_align_length;
rtx *new1;
char *new;
- new = xrealloc (f->emit->regno_pointer_flag, old_size * 2);
- memset (new + old_size, 0, old_size);
- f->emit->regno_pointer_flag = new;
-
new = xrealloc (f->emit->regno_pointer_align, old_size * 2);
memset (new + old_size, 0, old_size);
f->emit->regno_pointer_align = (unsigned char *) new;
@@ -570,7 +566,7 @@
memset (new1 + old_size, 0, old_size * sizeof (rtx));
regno_reg_rtx = new1;
- f->emit->regno_pointer_flag_length = old_size * 2;
+ f->emit->regno_pointer_align_length = old_size * 2;
}
val = gen_rtx_raw_REG (mode, reg_rtx_no);
@@ -603,9 +599,9 @@
rtx reg;
int align;
{
- if (! REGNO_POINTER_FLAG (REGNO (reg)))
+ if (! REG_POINTER (reg))
{
- REGNO_POINTER_FLAG (REGNO (reg)) = 1;
+ REG_POINTER (reg) = 1;
if (align)
REGNO_POINTER_ALIGN (REGNO (reg)) = align;
@@ -1710,7 +1706,6 @@
struct function *f;
{
free (f->emit->x_regno_reg_rtx);
- free (f->emit->regno_pointer_flag);
free (f->emit->regno_pointer_align);
free (f->emit);
f->emit = NULL;
@@ -3915,17 +3910,14 @@
/* Init the tables that describe all the pseudo regs. */
- f->emit->regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101;
-
- f->emit->regno_pointer_flag
- = (char *) xcalloc (f->emit->regno_pointer_flag_length, sizeof (char));
+ f->emit->regno_pointer_align_length = LAST_VIRTUAL_REGISTER + 101;
f->emit->regno_pointer_align
- = (unsigned char *) xcalloc (f->emit->regno_pointer_flag_length,
+ = (unsigned char *) xcalloc (f->emit->regno_pointer_align_length,
sizeof (unsigned char));
regno_reg_rtx
- = (rtx *) xcalloc (f->emit->regno_pointer_flag_length * sizeof (rtx),
+ = (rtx *) xcalloc (f->emit->regno_pointer_align_length * sizeof (rtx),
sizeof (rtx));
/* Put copies of all the virtual register rtx into regno_reg_rtx. */
@@ -3933,16 +3925,16 @@
/* Indicate that the virtual registers and stack locations are
all pointers. */
- REGNO_POINTER_FLAG (STACK_POINTER_REGNUM) = 1;
- REGNO_POINTER_FLAG (FRAME_POINTER_REGNUM) = 1;
- REGNO_POINTER_FLAG (HARD_FRAME_POINTER_REGNUM) = 1;
- REGNO_POINTER_FLAG (ARG_POINTER_REGNUM) = 1;
-
- REGNO_POINTER_FLAG (VIRTUAL_INCOMING_ARGS_REGNUM) = 1;
- REGNO_POINTER_FLAG (VIRTUAL_STACK_VARS_REGNUM) = 1;
- REGNO_POINTER_FLAG (VIRTUAL_STACK_DYNAMIC_REGNUM) = 1;
- REGNO_POINTER_FLAG (VIRTUAL_OUTGOING_ARGS_REGNUM) = 1;
- REGNO_POINTER_FLAG (VIRTUAL_CFA_REGNUM) = 1;
+ REG_POINTER (stack_pointer_rtx) = 1;
+ REG_POINTER (frame_pointer_rtx) = 1;
+ REG_POINTER (hard_frame_pointer_rtx) = 1;
+ REG_POINTER (arg_pointer_rtx) = 1;
+
+ REG_POINTER (virtual_incoming_args_rtx) = 1;
+ REG_POINTER (virtual_stack_vars_rtx) = 1;
+ REG_POINTER (virtual_stack_dynamic_rtx) = 1;
+ REG_POINTER (virtual_outgoing_args_rtx) = 1;
+ REG_POINTER (virtual_cfa_rtx) = 1;
#ifdef STACK_BOUNDARY
REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM) = STACK_BOUNDARY;
@@ -3988,7 +3980,7 @@
if (es == 0)
return;
- for (i = es->regno_pointer_flag_length, r = es->x_regno_reg_rtx;
+ for (i = es->regno_pointer_align_length, r = es->x_regno_reg_rtx;
i > 0; --i, ++r)
ggc_mark_rtx (*r);
--- flow.c.orig Tue Nov 14 13:28:03 2000
+++ flow.c Wed Nov 22 12:38:25 2000
@@ -6016,7 +6016,7 @@
reg_class_names[(int) class],
reg_class_names[(int) altclass]);
}
- if (REGNO_POINTER_FLAG (i))
+ if (REG_POINTER (regno_reg_rtx[i]))
fprintf (file, "; pointer");
fprintf (file, ".\n");
}
--- function.c.orig Mon Nov 13 02:00:55 2000
+++ function.c Wed Nov 22 12:39:52 2000
@@ -1110,7 +1110,7 @@
a temporary slot we know it points to. To be consistent with
the code below, we really should preserve all non-kept slots
if we can't find a match, but that seems to be much too costly. */
- if (GET_CODE (x) == REG && REGNO_POINTER_FLAG (REGNO (x)))
+ if (GET_CODE (x) == REG && REG_POINTER (x))
p = find_temp_slot_from_address (x);
/* If X is not in memory or is at a constant address, it cannot be in
--- integrate.c.orig Tue Nov 7 17:49:52 2000
+++ integrate.c Wed Nov 22 13:10:21 2000
@@ -822,8 +822,8 @@
if (map->insns_at_start == 0)
map->insns_at_start = emit_note (NULL_PTR, NOTE_INSN_DELETED);
- map->regno_pointer_flag = inl_f->emit->regno_pointer_flag;
map->regno_pointer_align = inl_f->emit->regno_pointer_align;
+ map->x_regno_reg_rtx = inl_f->emit->x_regno_reg_rtx;
/* Update the outgoing argument size to allow for those in the inlined
function. */
@@ -1878,7 +1878,7 @@
RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (orig);
/* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
- if (map->regno_pointer_flag[regno])
+ if (REG_POINTER (map->x_regno_reg_rtx[regno]))
mark_reg_pointer (map->reg_map[regno],
map->regno_pointer_align[regno]);
}
@@ -1923,7 +1923,7 @@
RTX_UNCHANGING_P (map->reg_map[regno]) = RTX_UNCHANGING_P (temp);
/* A reg with REG_FUNCTION_VALUE_P true will never reach here. */
- if (map->regno_pointer_flag[regno])
+ if (REG_POINTER (map->x_regno_reg_rtx[regno]))
mark_reg_pointer (map->reg_map[regno],
map->regno_pointer_align[regno]);
regno = REGNO (map->reg_map[regno]);
--- loop.c.orig Mon Nov 13 17:20:02 2000
+++ loop.c Wed Nov 22 12:58:42 2000
@@ -4182,11 +4182,11 @@
the alignment. */
if (GET_CODE (v->new_reg) == REG
&& v->giv_type == DEST_REG
- && REGNO_POINTER_FLAG (REGNO (v->dest_reg)))
+ && REG_POINTER (v->dest_reg))
mark_reg_pointer (v->new_reg,
REGNO_POINTER_ALIGN (REGNO (v->dest_reg)));
else if (GET_CODE (v->new_reg) == REG
- && REGNO_POINTER_FLAG (REGNO (v->src_reg)))
+ && REG_POINTER (v->src_reg))
{
unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->src_reg));
@@ -4199,7 +4199,7 @@
}
else if (GET_CODE (v->new_reg) == REG
&& GET_CODE (v->add_val) == REG
- && REGNO_POINTER_FLAG (REGNO (v->add_val)))
+ && REG_POINTER (v->add_val))
{
unsigned int align = REGNO_POINTER_ALIGN (REGNO (v->add_val));
@@ -7873,7 +7873,7 @@
|| GET_CODE (v->add_val) == LABEL_REF
|| GET_CODE (v->add_val) == CONST
|| (GET_CODE (v->add_val) == REG
- && REGNO_POINTER_FLAG (REGNO (v->add_val)))))
+ && REG_POINTER (v->add_val))))
{
if (! biv_elimination_giv_has_0_offset (bl->biv, v, insn))
continue;
@@ -7937,7 +7937,7 @@
|| GET_CODE (v->add_val) == LABEL_REF
|| GET_CODE (v->add_val) == CONST
|| (GET_CODE (v->add_val) == REG
- && REGNO_POINTER_FLAG (REGNO (v->add_val))))
+ && REG_POINTER (v->add_val)))
&& ! v->ignore && ! v->maybe_dead && v->always_computable
&& v->mode == mode)
{
--- predict.c.orig Fri May 19 18:27:26 2000
+++ predict.c Wed Nov 22 12:42:18 2000
@@ -146,10 +146,10 @@
{
case EQ:
if (GET_CODE (XEXP (cond, 0)) == REG
- && REGNO_POINTER_FLAG (REGNO (XEXP (cond, 0)))
+ && REG_POINTER (XEXP (cond, 0))
&& (XEXP (cond, 1) == const0_rtx
|| (GET_CODE (XEXP (cond, 1)) == REG
- && REGNO_POINTER_FLAG (REGNO (XEXP (cond, 1))))))
+ && REG_POINTER (XEXP (cond, 1)))))
{
prob = PROB_UNLIKELY;
goto emitnote;
@@ -157,10 +157,10 @@
break;
case NE:
if (GET_CODE (XEXP (cond, 0)) == REG
- && REGNO_POINTER_FLAG (REGNO (XEXP (cond, 0)))
+ && REG_POINTER (XEXP (cond, 0))
&& (XEXP (cond, 1) == const0_rtx
|| (GET_CODE (XEXP (cond, 1)) == REG
- && REGNO_POINTER_FLAG (REGNO (XEXP (cond, 1))))))
+ && REG_POINTER (XEXP (cond, 1)))))
{
prob = PROB_LIKELY;
goto emitnote;
--- regclass.c.orig Fri Nov 10 11:01:14 2000
+++ regclass.c Wed Nov 22 12:46:11 2000
@@ -1847,10 +1847,10 @@
/* When we have an address that is a sum,
we must determine whether registers are "base" or "index" regs.
If there is a sum of two registers, we must choose one to be
- the "base". Luckily, we can use the REGNO_POINTER_FLAG
- to make a good choice most of the time. We only need to do this
- on machines that can have two registers in an address and where
- the base and index register classes are different.
+ the "base". Luckily, we can use the REG_POINTER to make a good
+ choice most of the time. We only need to do this on machines
+ that can have two registers in an address and where the base
+ and index register classes are different.
??? This code used to set REGNO_POINTER_FLAG in some cases, but
that seems bogus since it should only be set when we are sure
@@ -1923,13 +1923,13 @@
with the other operand the index. Likewise if the other operand
is a MULT. */
- else if ((code0 == REG && REGNO_POINTER_FLAG (REGNO (arg0)))
+ else if ((code0 == REG && REG_POINTER (arg0))
|| code1 == MULT)
{
record_address_regs (arg0, BASE_REG_CLASS, scale);
record_address_regs (arg1, INDEX_REG_CLASS, scale);
}
- else if ((code1 == REG && REGNO_POINTER_FLAG (REGNO (arg1)))
+ else if ((code1 == REG && REG_POINTER (arg1))
|| code0 == MULT)
{
record_address_regs (arg0, INDEX_REG_CLASS, scale);
@@ -2331,18 +2331,18 @@
/* If the destination pseudo is set more than once, then other
sets might not be to a pointer value (consider access to a
union in two threads of control in the presense of global
- optimizations). So only set REGNO_POINTER_FLAG on the destination
+ optimizations). So only set REG_POINTER on the destination
pseudo if this is the only set of that pseudo. */
&& REG_N_SETS (REGNO (SET_DEST (x))) == 1
&& ! REG_USERVAR_P (SET_DEST (x))
- && ! REGNO_POINTER_FLAG (REGNO (SET_DEST (x)))
+ && ! REG_POINTER (SET_DEST (x))
&& ((GET_CODE (SET_SRC (x)) == REG
- && REGNO_POINTER_FLAG (REGNO (SET_SRC (x))))
+ && REG_POINTER (SET_SRC (x)))
|| ((GET_CODE (SET_SRC (x)) == PLUS
|| GET_CODE (SET_SRC (x)) == LO_SUM)
&& GET_CODE (XEXP (SET_SRC (x), 1)) == CONST_INT
&& GET_CODE (XEXP (SET_SRC (x), 0)) == REG
- && REGNO_POINTER_FLAG (REGNO (XEXP (SET_SRC (x), 0))))
+ && REG_POINTER (XEXP (SET_SRC (x), 0)))
|| GET_CODE (SET_SRC (x)) == CONST
|| GET_CODE (SET_SRC (x)) == SYMBOL_REF
|| GET_CODE (SET_SRC (x)) == LABEL_REF
@@ -2359,7 +2359,7 @@
&& (GET_CODE (XEXP (note, 0)) == CONST
|| GET_CODE (XEXP (note, 0)) == SYMBOL_REF
|| GET_CODE (XEXP (note, 0)) == LABEL_REF))))
- REGNO_POINTER_FLAG (REGNO (SET_DEST (x))) = 1;
+ REG_POINTER (SET_DEST (x)) = 1;
/* ... fall through ... */
--- unroll.c.orig Tue Nov 7 17:49:54 2000
+++ unroll.c Wed Nov 22 13:15:16 2000
@@ -1197,8 +1197,8 @@
}
/* Use our current register alignment and pointer flags. */
- map->regno_pointer_flag = cfun->emit->regno_pointer_flag;
map->regno_pointer_align = cfun->emit->regno_pointer_align;
+ map->x_regno_reg_rtx = cfun->emit->x_regno_reg_rtx;
/* If the loop is being partially unrolled, and the iteration variables
are being split, and are being renamed for the split, then must fix up
--- config/convex/convex.h.orig Thu Nov 2 18:29:09 2000
+++ config/convex/convex.h Wed Nov 22 16:38:58 2000
@@ -1112,9 +1112,8 @@
#define RTX_COSTS(RTX,CODE,OUTER_CODE) \
case PLUS: \
- if (cfun->emit->regno_pointer_flag != 0 \
- && GET_CODE (XEXP (RTX, 0)) == REG \
- && REGNO_POINTER_FLAG (REGNO (XEXP (RTX, 0))) \
+ if (GET_CODE (XEXP (RTX, 0)) == REG \
+ && REG_POINTER (XEXP (RTX, 0)) \
&& GET_CODE (XEXP (RTX, 1)) == CONST_INT) \
return 0; \
else break; \
--- config/pa/pa.c.orig Tue Oct 17 22:12:03 2000
+++ config/pa/pa.c Wed Nov 22 18:32:13 2000
@@ -912,8 +912,8 @@
idx = NULL_RTX;
/* Make sure they're both regs. If one was a SYMBOL_REF [+ const],
- then emit_move_sequence will turn on REGNO_POINTER_FLAG so we'll
- know it's a base register below. */
+ then emit_move_sequence will turn on REG_POINTER so we'll know
+ it's a base register below. */
if (GET_CODE (reg1) != REG)
reg1 = force_reg (Pmode, force_operand (reg1, 0));
@@ -923,7 +923,7 @@
/* Figure out what the base and index are. */
if (GET_CODE (reg1) == REG
- && REGNO_POINTER_FLAG (REGNO (reg1)))
+ && REG_POINTER (reg1))
{
base = reg1;
orig_base = XEXP (XEXP (x, 0), 1);
@@ -934,7 +934,7 @@
XEXP (x, 1));
}
else if (GET_CODE (reg2) == REG
- && REGNO_POINTER_FLAG (REGNO (reg2)))
+ && REG_POINTER (reg2))
{
base = reg2;
orig_base = XEXP (x, 1);
@@ -1544,9 +1544,9 @@
Don't mark hard registers though. That loses. */
if (GET_CODE (operand0) == REG
&& REGNO (operand0) >= FIRST_PSEUDO_REGISTER)
- REGNO_POINTER_FLAG (REGNO (operand0)) = 1;
+ REG_POINTER (operand0) = 1;
if (REGNO (temp) >= FIRST_PSEUDO_REGISTER)
- REGNO_POINTER_FLAG (REGNO (temp)) = 1;
+ REG_POINTER (temp) = 1;
if (ishighonly)
set = gen_rtx_SET (mode, operand0, temp);
else
@@ -6148,17 +6165,19 @@
if (!cse_not_expected)
return 0;
- /* Once reload has started everything is considered valid. Reload should
- only create indexed addresses using the stack/frame pointer, and any
- others were checked for validity when created by the combine pass.
-
- Also allow any register when TARGET_NO_SPACE_REGS is in effect since
- we don't have to worry about the braindamaged implicit space register
- selection using the basereg only (rather than effective address)
- screwing us over. */
- if (TARGET_NO_SPACE_REGS || reload_in_progress || reload_completed)
+ /* Allow any register when TARGET_NO_SPACE_REGS is in effect since
+ we don't have to worry about the braindamaged implicit space
+ register selection from the basereg. */
+ if (TARGET_NO_SPACE_REGS)
return (GET_CODE (op) == REG);
+ /* Once reload has started any register with REG_POINTER set
+ is considered valid. Reload should only create indexed addresses
+ using the stack/frame pointer. All others are checked for
+ validity when they are created by the combine pass. */
+ if (reload_in_progress || reload_completed)
+ return (GET_CODE (op) == REG && REG_POINTER (op));
+
/* Stack is always OK for indexing. */
if (op == stack_pointer_rtx)
return 1;
@@ -6170,13 +6189,11 @@
return 1;
/* The only other valid OPs are pseudo registers with
- REGNO_POINTER_FLAG set. */
- if (GET_CODE (op) != REG
- || REGNO (op) < FIRST_PSEUDO_REGISTER
- || ! register_operand (op, mode))
- return 0;
-
- return REGNO_POINTER_FLAG (REGNO (op));
+ REG_POINTER set. */
+ return (GET_CODE (op) == REG
+ && REGNO (op) >= FIRST_PSEUDO_REGISTER
+ && register_operand (op, mode)
+ && REG_POINTER (op));
}
/* Return 1 if this operand is anything other than a hard register. */
@@ -6374,7 +6391,7 @@
Because of this mis-feature we have to know which register in a reg+reg
address is the base and which is the index.
- Before reload, the base can be identified by REGNO_POINTER_FLAG. We use
+ Before reload, the base can be identified by REG_POINTER. We use
this to force base + index addresses to match a different insn than
index + base addresses.
@@ -6394,8 +6411,12 @@
using unscaled indexed addresses have the same INSN_CODE as they did
immediately before delay slot scheduling.
- This is extremely gross. Long term, I'd like to be able to look at
- REG_POINTER_FLAG to handle these kinds of problems. */
+ This is extremely gross. Long term, I'd like to use REG_POINTER to
+ handle these kinds of problems.
+
+ FIXME: Is this still necessary now that the pointer flag is stored
+ in REG rtx's and basereg_operand properly checks for the flag after
+ reload? */
static void
record_unscaled_index_insn_codes (insns)