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x86 pinsrw/pextrw/pshufw fix -mintel-syntax operand order.


All

The pinsrw, pextrw and pshufw are three operand instructions and we are
currently output the operands in the wrong order when using -mintel-syntax.

Here's a patch which outputs the operands in the correct order.

OK to commit?

Graham

ChangeLog
	* config/i386/i386.md (mmx_pinsrw): Output operands in correct
	order for -mintel-syntax.
	(mmx_pextrw): Likewise.
	(mmx_pshufw): Likewise.

-----------------------------------------------------------------------------
Index: i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.190
diff -c -p -r1.190 i386.md
*** i386.md     2000/10/31 20:50:30     1.190
--- i386.md     2000/11/07 13:59:49
***************
*** 12832,12838 ****
                        (match_operand:SI 3 "immediate_operand" "i")))]
    "TARGET_SSE"
    ;; @@@ check operand order for intel/nonintel syntax.
!   "pinsrw\\t%3, {%2, %0|%0, %2}"
    [(set_attr "type" "sse")])

  (define_insn "mmx_pextrw"
--- 12832,12838 ----
                        (match_operand:SI 3 "immediate_operand" "i")))]
    "TARGET_SSE"
    ;; @@@ check operand order for intel/nonintel syntax.
!   "pinsrw\\t{%3, %2, %0|%0, %2, %3}"
    [(set_attr "type" "sse")])

  (define_insn "mmx_pextrw"
***************
*** 12842,12848 ****
                                        [(match_operand:SI 2 "immediate_operand" "i")]))))]
    "TARGET_SSE"
    ;; @@@ check operand order for intel/nonintel syntax.
!   "pextrw\\t%2, {%1, %0|%0, %1}"
    [(set_attr "type" "sse")])

  (define_insn "mmx_pshufw"
--- 12842,12848 ----
                                        [(match_operand:SI 2 "immediate_operand" "i")]))))]
    "TARGET_SSE"
    ;; @@@ check operand order for intel/nonintel syntax.
!   "pextrw\\t{%2, %1, %0|%0, %1, %2}"
    [(set_attr "type" "sse")])

  (define_insn "mmx_pshufw"
***************
*** 12852,12858 ****
                      (match_operand:SI 3 "immediate_operand" "i")] 41))]
    "TARGET_SSE"
    ;; @@@ check operand order for intel/nonintel syntax
!   "pshufw\\t %3,{%2, %0|%0, %2}"
    [(set_attr "type" "sse")])


--- 12852,12858 ----
                      (match_operand:SI 3 "immediate_operand" "i")] 41))]
    "TARGET_SSE"
    ;; @@@ check operand order for intel/nonintel syntax
!   "pshufw\\t{%3, %2, %0|%0, %2, %3}"
    [(set_attr "type" "sse")])


-----------------------------------------------------------------------------

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