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ev4 unaligned memory vs aliasing


Forcing AND addresses into alias set zero had been done elsewhere
in the backend, but haphazardly.  This gets the rest of them.



r~


        * config/alpha/alpha.c (alpha_expand_unaligned_load): Force all
        AND addresses into alias set 0.
        (alpha_expand_unaligned_store): Likewise.
        (alpha_expand_unaligned_load_words): Likewise.
        (alpha_expand_unaligned_store_words): Likewise.

Index: config/alpha/alpha.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/alpha/alpha.c,v
retrieving revision 1.140
diff -c -p -d -r1.140 alpha.c
*** alpha.c	2000/08/25 19:08:47	1.140
--- alpha.c	2000/09/15 11:05:21
*************** alpha_expand_unaligned_load (tgt, mem, s
*** 2292,2298 ****
       HOST_WIDE_INT size, ofs;
       int sign;
  {
!   rtx meml, memh, addr, extl, exth;
    enum machine_mode mode;
  
    meml = gen_reg_rtx (DImode);
--- 2292,2298 ----
       HOST_WIDE_INT size, ofs;
       int sign;
  {
!   rtx meml, memh, addr, extl, exth, tmp;
    enum machine_mode mode;
  
    meml = gen_reg_rtx (DImode);
*************** alpha_expand_unaligned_load (tgt, mem, s
*** 2301,2319 ****
    extl = gen_reg_rtx (DImode);
    exth = gen_reg_rtx (DImode);
  
!   emit_move_insn (meml,
! 		  change_address (mem, DImode,
! 				  gen_rtx_AND (DImode, 
! 					       plus_constant (XEXP (mem, 0),
! 							      ofs),
! 					       GEN_INT (-8))));
  
!   emit_move_insn (memh,
! 		  change_address (mem, DImode,
! 				  gen_rtx_AND (DImode, 
! 					       plus_constant (XEXP (mem, 0),
! 							      ofs + size - 1),
! 					       GEN_INT (-8))));
  
    if (sign && size == 2)
      {
--- 2301,2324 ----
    extl = gen_reg_rtx (DImode);
    exth = gen_reg_rtx (DImode);
  
!   /* AND addresses cannot be in any alias set, since they may implicitly
!      alias surrounding code.  Ideally we'd have some alias set that 
!      covered all types except those with alignment 8 or higher.  */
  
!   tmp = change_address (mem, DImode,
! 			gen_rtx_AND (DImode, 
! 				     plus_constant (XEXP (mem, 0), ofs),
! 				     GEN_INT (-8)));
!   MEM_ALIAS_SET (tmp) = 0;
!   emit_move_insn (meml, tmp);
! 
!   tmp = change_address (mem, DImode,
! 			gen_rtx_AND (DImode, 
! 				     plus_constant (XEXP (mem, 0),
! 						    ofs + size - 1),
! 				     GEN_INT (-8)));
!   MEM_ALIAS_SET (tmp) = 0;
!   emit_move_insn (memh, tmp);
  
    if (sign && size == 2)
      {
*************** alpha_expand_unaligned_store (dst, src, 
*** 2377,2391 ****
--- 2382,2403 ----
    insl = gen_reg_rtx (DImode);
    insh = gen_reg_rtx (DImode);
  
+   /* AND addresses cannot be in any alias set, since they may implicitly
+      alias surrounding code.  Ideally we'd have some alias set that 
+      covered all types except those with alignment 8 or higher.  */
+ 
    meml = change_address (dst, DImode,
  			 gen_rtx_AND (DImode, 
  				      plus_constant (XEXP (dst, 0), ofs),
  				      GEN_INT (-8)));
+   MEM_ALIAS_SET (meml) = 0;
+ 
    memh = change_address (dst, DImode,
  			 gen_rtx_AND (DImode, 
  				      plus_constant (XEXP (dst, 0),
  						     ofs+size-1),
  				      GEN_INT (-8)));
+   MEM_ALIAS_SET (memh) = 0;
  
    emit_move_insn (dsth, memh);
    emit_move_insn (dstl, meml);
*************** alpha_expand_unaligned_load_words (out_r
*** 2462,2468 ****
    rtx const im8 = GEN_INT (-8);
    rtx const i64 = GEN_INT (64);
    rtx ext_tmps[MAX_MOVE_WORDS], data_regs[MAX_MOVE_WORDS+1];
!   rtx sreg, areg;
    HOST_WIDE_INT i;
  
    /* Generate all the tmp registers we need.  */
--- 2474,2480 ----
    rtx const im8 = GEN_INT (-8);
    rtx const i64 = GEN_INT (64);
    rtx ext_tmps[MAX_MOVE_WORDS], data_regs[MAX_MOVE_WORDS+1];
!   rtx sreg, areg, tmp;
    HOST_WIDE_INT i;
  
    /* Generate all the tmp registers we need.  */
*************** alpha_expand_unaligned_load_words (out_r
*** 2480,2498 ****
    /* Load up all of the source data.  */
    for (i = 0; i < words; ++i)
      {
!       emit_move_insn (data_regs[i],
! 		      change_address (smem, DImode,
! 				      gen_rtx_AND (DImode,
! 						   plus_constant (XEXP(smem,0),
! 								  8*i),
! 						   im8)));
      }
!   emit_move_insn (data_regs[words],
! 		  change_address (smem, DImode,
! 				  gen_rtx_AND (DImode,
! 					       plus_constant (XEXP(smem,0),
! 							      8*words - 1),
! 					       im8)));
  
    /* Extract the half-word fragments.  Unfortunately DEC decided to make
       extxh with offset zero a noop instead of zeroing the register, so 
--- 2492,2511 ----
    /* Load up all of the source data.  */
    for (i = 0; i < words; ++i)
      {
!       tmp = change_address (smem, DImode,
! 			    gen_rtx_AND (DImode,
! 					 plus_constant (XEXP(smem,0), 8*i),
! 					 im8));
!       MEM_ALIAS_SET (tmp) = 0;
!       emit_move_insn (data_regs[i], tmp);
      }
! 
!   tmp = change_address (smem, DImode,
! 			gen_rtx_AND (DImode,
! 				     plus_constant (XEXP(smem,0), 8*words - 1),
! 				     im8));
!   MEM_ALIAS_SET (tmp) = 0;
!   emit_move_insn (data_regs[words], tmp);
  
    /* Extract the half-word fragments.  Unfortunately DEC decided to make
       extxh with offset zero a noop instead of zeroing the register, so 
*************** alpha_expand_unaligned_store_words (data
*** 2559,2568 ****
--- 2572,2584 ----
  					   plus_constant (XEXP(dmem,0),
  							  words*8 - 1),
  				       im8));
+   MEM_ALIAS_SET (st_addr_2) = 0;
+ 
    st_addr_1 = change_address (dmem, DImode,
  			      gen_rtx_AND (DImode, 
  					   XEXP (dmem, 0),
  					   im8));
+   MEM_ALIAS_SET (st_addr_1) = 0;
  
    /* Load up the destination end bits.  */
    emit_move_insn (st_tmp_2, st_addr_2);
*************** alpha_expand_unaligned_store_words (data
*** 2601,2612 ****
    emit_move_insn (st_addr_2, st_tmp_2);
    for (i = words-1; i > 0; --i)
      {
!       emit_move_insn (change_address (dmem, DImode,
! 				      gen_rtx_AND (DImode,
! 						   plus_constant(XEXP (dmem,0),
! 								 i*8),
! 					       im8)),
! 		      data_regs ? ins_tmps[i-1] : const0_rtx);
      }
    emit_move_insn (st_addr_1, st_tmp_1);
  }
--- 2617,2628 ----
    emit_move_insn (st_addr_2, st_tmp_2);
    for (i = words-1; i > 0; --i)
      {
!       rtx tmp = change_address (dmem, DImode,
! 				gen_rtx_AND (DImode,
! 					     plus_constant(XEXP (dmem,0), i*8),
! 					     im8));
!       MEM_ALIAS_SET (tmp) = 0;
!       emit_move_insn (tmp, data_regs ? ins_tmps[i-1] : const0_rtx);
      }
    emit_move_insn (st_addr_1, st_tmp_1);
  }

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