Re: choose_reload_regs V2.0

[Alan Goluban <agoluban at rasips1 dot rasip dot fer dot hr>]

TO Bernd:
-----------

Regarding your patch for mips.md, dated Thu, 7 Sep 2000:
I tried to compile egcs-20000904 with your patch, but there was a small
problem. It seems that "" is missing:
-----------------------------------------------------------------
*** mips.md	Sat Sep  9 20:49:37 2000
--- mips.md.new	Mon Sep 10 09:53:15 2000
***************
*** 1220,1226 ****
    [(parallel [(set (match_operand:DI 0 "register_operand" "=d")
  		   (minus:DI (match_operand:DI 1 "se_register_operand" "d")
  			     (match_operand:DI 2 "se_register_operand" "d")))
! 	      (clobber (match_scratch:SI 3))])]
    "TARGET_64BIT || (!TARGET_DEBUG_G_MODE && !TARGET_MIPS16)"
    "
  {
--- 1220,1226 ----
    [(parallel [(set (match_operand:DI 0 "register_operand" "=d")
  		   (minus:DI (match_operand:DI 1 "se_register_operand" "d")
  			     (match_operand:DI 2 "se_register_operand" "d")))
! 	      (clobber (match_scratch:SI 3 ""))])]
    "TARGET_64BIT || (!TARGET_DEBUG_G_MODE && !TARGET_MIPS16)"
    "
  {
-----------------------------------------------------------------
With this mips.md, I wasn't able to force gcc to produce incorrect code.

Regarding your patch for reload.c, dated Tue, 5 Sep 2000, for adding third
argument to function regno_clobbered_p(); I think the folowing change
is needed:
-----------------------------------------------------------------
--- reload.c	Mon Sep 10 13:22:59 2000
+++ reload.c.new	Mon Sep 10 13:24:23 2000
@@ -6626,7 +6626,7 @@ regno_clobbered_p (regno, insn, mode)
     {
       int test = REGNO (XEXP (PATTERN (insn), 0));
 
-      return regno >= test && test < endregno;
+      return (test >= regno && test < endregno);
     }
 
   if (GET_CODE (PATTERN (insn)) == PARALLEL)
@@ -6640,7 +6640,7 @@ regno_clobbered_p (regno, insn, mode)
 	    {
 	      int test = REGNO (XEXP (elt, 0));
 	      
-	      if (regno >= test && test < endregno)
+	      if (test >= regno && test < endregno)
 		return 1;
 	    }
 	}
-----------------------------------------------------------------



TO Jeff:
----------

> If the assembly code generated by a pattern modifies an output (which
> includes clobbers) before all of its inputs have been read, then the output
> which is modified must be marked with an earlyclobber.  The MIPS patterns
> clearly violate that rule as they modify the clobber before they read all
> their inputs.

Is's OK for MIPS patterns which were incorrect. Asm-insns are user-specified,
and are not defined in md-files. What if asm-insn doesn't have output registers?
For example, setting some bits in WIM register on sparc:

asm("rd %%wim, %%l0; nop; nop; nop\n"
    "or %%l0, %0, %%l0\n"
    "wr %%l0, %%wim; nop; nop; nop\n"
    :
    : "r"(bits)
    : "%l0" );

This is (almost) real-world example, because linux-kernel has a number of
similar macros for various archs. The compiler doesn't know anything about
WIM register, so effectively there are no outputs, but one explicit clobber.
How this clobber (%l0) can be marked as an earlyclobber? Maybe this "asm" is
incorrectly written?
If it is written OK, for example, the linux is compiled with -O2 so there is
a chance that reload for "bits" is inherited in clobbered register %l0.

Or, maybe I am getting this all wrong. :)


Alan Goluban