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AM30/AM33: move SP adds into a separate pattern
- To: gcc-patches at gcc dot gnu dot org
- Subject: AM30/AM33: move SP adds into a separate pattern
- From: Alexandre Oliva <aoliva at cygnus dot com>
- Date: 21 Apr 2000 19:11:01 -0300
- Organization: Cygnus Solutions, a Red Hat Company
This patch simplifies the handling of SP adds. Previously, the movsi
expand would explicitly request a new register to add non-constant
values to SP. This step doesn't appear to be necessary, and removing
it actually slightly improves the generated code:
^ gcc/am33/libgcc.a 26953 26955
v gcc/libgcc.a 27027 27022
v mn10300-elf/am33/libio/libiostream.a 64000 63981
v mn10300-elf/am33/libstdc++/libstdc++.a 69862 69843
I also move SP adds to a separate pattern, since it makes the code
simpler. Ok to install?
Index: gcc/ChangeLog
from Alexandre Oliva <aoliva@cygnus.com>
* config/mn10300/mn10300.md (addsi): Remove special handling of SP
adds from define_expand. Move SP add to separate define_insn.
Index: gcc/config/mn10300/mn10300.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/mn10300/mn10300.md,v
retrieving revision 1.28
diff -u -r1.28 mn10300.md
--- gcc/config/mn10300/mn10300.md 2000/04/21 21:14:13 1.28
+++ gcc/config/mn10300/mn10300.md 2000/04/21 21:58:28
@@ -744,25 +744,19 @@
(plus:SI (match_operand:SI 1 "register_operand" "")
(match_operand:SI 2 "nonmemory_operand" "")))]
""
- "
-{
- /* We can't add a variable amount directly to the stack pointer;
- so do so via a temporary register. */
- if (operands[0] == stack_pointer_rtx
- && GET_CODE (operands[1]) != CONST_INT
- && GET_CODE (operands[2]) != CONST_INT)
- {
- rtx temp = gen_reg_rtx (SImode);
- emit_move_insn (temp, gen_rtx_PLUS (SImode, operands[1], operands[2]));
- emit_move_insn (operands[0], temp);
- DONE;
- }
-}")
+ "")
+
+(define_insn ""
+ [(set (match_operand:SI 0 "register_operand" "=y")
+ (plus:SI (match_dup 0) (match_operand:SI 1 "immediate_operand" "i")))]
+ "operands[0] == stack_pointer_rtx"
+ "add %1, %0"
+ [(set_attr "cc" "none_0hit")])
(define_insn ""
- [(set (match_operand:SI 0 "register_operand" "=dx,ax,ax,dax,xy,!dax")
- (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,dax")
- (match_operand:SI 2 "nonmemory_operand" "J,J,L,daxi,i,dax")))]
+ [(set (match_operand:SI 0 "register_operand" "=dx,ax,ax,dax,!dax")
+ (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,dax")
+ (match_operand:SI 2 "nonmemory_operand" "J,J,L,daxi,dax")))]
"TARGET_AM33"
"*
{
@@ -774,9 +768,8 @@
case 2:
return \"inc4 %0\";
case 3:
- case 4:
return \"add %2,%0\";
- case 5:
+ case 4:
{
enum reg_class src1_class, src2_class, dst_class;
@@ -835,12 +828,12 @@
abort();
}
}"
- [(set_attr "cc" "set_zn,none_0hit,none_0hit,set_zn,none_0hit,set_zn")])
+ [(set_attr "cc" "set_zn,none_0hit,none_0hit,set_zn,set_zn")])
(define_insn ""
- [(set (match_operand:SI 0 "register_operand" "=dx,ax,ax,dax,xy,!dax")
- (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,0,dax")
- (match_operand:SI 2 "nonmemory_operand" "J,J,L,daxi,i,dax")))]
+ [(set (match_operand:SI 0 "register_operand" "=dx,ax,ax,dax,!dax")
+ (plus:SI (match_operand:SI 1 "register_operand" "%0,0,0,0,dax")
+ (match_operand:SI 2 "nonmemory_operand" "J,J,L,daxi,dax")))]
""
"*
{
@@ -852,9 +845,8 @@
case 2:
return \"inc4 %0\";
case 3:
- case 4:
return \"add %2,%0\";
- case 5:
+ case 4:
/* I'm not sure if this can happen or not. Might as well be prepared
and generate the best possible code if it does happen. */
if (true_regnum (operands[0]) == true_regnum (operands[1]))
@@ -877,7 +869,7 @@
abort();
}
}"
- [(set_attr "cc" "set_zn,none_0hit,none_0hit,set_zn,none_0hit,set_zn")])
+ [(set_attr "cc" "set_zn,none_0hit,none_0hit,set_zn,set_zn")])
;; ----------------------------------------------------------------------
;; SUBTRACT INSTRUCTIONS
--
Alexandre Oliva Enjoy Guaranį, see http://www.ic.unicamp.br/~oliva/
Cygnus Solutions, a Red Hat company aoliva@{redhat, cygnus}.com
Free Software Developer and Evangelist CS PhD student at IC-Unicamp
oliva@{lsd.ic.unicamp.br, gnu.org} Write to mailing lists, not to me