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I387 predicates patch
- To: egcs-patches at egcs dot cygnus dot com
- Subject: I387 predicates patch
- From: Jan Hubicka <hubicka at atrey dot karlin dot mff dot cuni dot cz>
- Date: Wed, 5 Jan 2000 13:53:05 +0100
Hi
Sorry for sending it twice, I've made typo in the email address..
Here is the predicates patch. Overall it removes 38 patterns at the
expense of adding 12 new ones. To get old system to handle all cases,
we would need approx 30 new patterns.
*it breaks few testusites because of the SECONDARY_MEMORY_NEEDED problem*
FAIL: gcc.c-torture/compile/920723-1.c, -Os
FAIL: gcc.c-torture/compile/991229-2.c, -O0
FAIL: gcc.c-torture/execute/921113-1.c compilation, -O3 -fomit-frame-pointer
FAIL: gcc.c-torture/execute/921113-1.c compilation, -O3 -g
FAIL: gcc.c-torture/execute/complex-3.c compilation, -O1
FAIL: gcc.c-torture/execute/complex-3.c compilation, -O2
FAIL: gcc.c-torture/execute/complex-3.c compilation, -O3 -fomit-frame-pointer
FAIL: gcc.c-torture/execute/complex-3.c compilation, -O3 -g
FAIL: gcc.c-torture/execute/complex-3.c compilation, -Os
See http://gcc.gnu.org/ml/gcc-patches/2000-01/msg00136.html
for more exmplanation what really happends.
After applying my first propagation patch, these problem disappear, but
it only mask the problem.
But I think we still can slowly go on path to get it installed
and discuss the best solution for reload.
Also note that it adds large number of predicates, whose most of them are
equivalent right now.
Many of them gets different in INDREG patch and I think we should use
them in future to control reg-stack (for example reg-stack might try to
construct pushing form of insn just by doing validate_change),
so we will be able to avoid all the speccases, that are not exact enought
anyway.
Wed Jan 5 13:13:18 MET 2000 Jan Hubicka <hubicka@freesoft.cz>
* i386.c (i387_reg_operand, i387_topreg_operand,
i387_output_reg_operand, i387_output_topreg_operand,
i387_output_push_operand, i387_memreg_operand, i387_pop_reg_operand,
i387_pop_reg_operand, i387_pop_memreg_operand, i387_move_operand,
i387_output_move_operand, i387_true_operand): New functions.
(print_operand): Use i387_ture_operand to strip down float_extends.
(output_387_binary_op, output_fp_compare): Likewise.
* i386-protos.h (i387_reg_operand, i387_topreg_operand,
i387_output_reg_operand, i387_output_topreg_operand,
i387_output_push_operand, i387_memreg_operand, i387_pop_reg_operand,
i387_pop_reg_operand, i387_pop_memreg_operand, i387_move_operand,
i387_output_move_operand, i387_true_operand): Declare.
* i386.h: PREDICATE_CODES: Add new i387* predicates.
* i386.md (cmpfp_0, cmpfp_xf_1, cmpfp_2u, cmpfp_2u_1, ficom_1,
fcom_fp_i, fcom_fp_iu, push?f, mov?f_1, swap?f, dummy_extend?f?f2,
extend?f?f2, trunc?f?f2_2, trunc?f?f2_1, fix_truncdi_1, fload?i?f2,
sqrt?f?f, mov?fcc): Change predicates.
(cmpfp_2, cmpfp_2_sf_1, cmpfp_2_df, cmpfp_2_df_1, negsf2_1,
negdf2_1, negextendsfdf2, negxf2_1, negextenddfxf2, negextendsfxf2,
absextendsfdf2, abssf2_1, absdf2_1, absxf2_1, absextenddfxf2,
absextendsfxf2, flop_sf_comm, flop_df_comm, fop_xf_comm, fop_sf_1,
fop_sf_2, fop_sf_3, fop_df_1, fop_df_2, fop_df_3, fop_df_4, fop_xf_1
fop_xf_2, fop_xf_3, fop_xf_4, fop_xf_5, fop_xf_6, fop_xf_7,
sqrtextendsfdf2, sqrtextenddfxf2, sqrtextendsfxf2, sinextendsfdf2,
cosextendsfdf2) Remove.
(cmpfp_2, cmpfp_2_1, neg_float, abs_float, fop_comm_1, fop_comm_2
fop_1, fop_2, fop_3, fop_4, fop_int_1, fop_int2): New patterns.
Index: egcs/gcc/config/i386//i386-protos.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386-protos.h,v
retrieving revision 1.7
diff -c -3 -p -r1.7 i386-protos.h
*** i386-protos.h 2000/01/03 02:30:52 1.7
--- i386-protos.h 2000/01/04 18:34:17
*************** extern int promotable_binary_operator PR
*** 64,70 ****
--- 64,81 ----
extern int memory_displacement_operand PROTO((rtx, enum machine_mode));
extern int cmpsi_operand PROTO((rtx, enum machine_mode));
extern int long_memory_operand PROTO((rtx, enum machine_mode));
+ extern int i387_reg_operand PROTO((rtx, enum machine_mode));
+ extern int i387_topreg_operand PROTO((rtx, enum machine_mode));
+ extern int i387_output_reg_operand PROTO((rtx, enum machine_mode));
+ extern int i387_output_topreg_operand PROTO((rtx, enum machine_mode));
+ extern int i387_output_push_operand PROTO((rtx, enum machine_mode));
+ extern int i387_memreg_operand PROTO((rtx, enum machine_mode));
+ extern int i387_pop_reg_operand PROTO((rtx, enum machine_mode));
+ extern int i387_pop_memreg_operand PROTO((rtx, enum machine_mode));
+ extern int i387_move_operand PROTO((rtx, enum machine_mode));
+ extern int i387_output_move_operand PROTO((rtx, enum machine_mode));
+ extern struct rtx_def * i387_true_operand PROTO((rtx));
extern int legitimate_pic_address_disp_p PROTO((rtx));
extern int legitimate_address_p PROTO((enum machine_mode, rtx, int));
Index: egcs/gcc/config/i386//i386.c
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.c,v
retrieving revision 1.118
diff -c -3 -p -r1.118 i386.c
*** i386.c 2000/01/04 14:44:03 1.118
--- i386.c 2000/01/04 18:34:18
*************** long_memory_operand (op, mode)
*** 1339,1344 ****
--- 1339,1491 ----
return memory_address_length (op) != 0;
}
+ /* Strip ignored float extends in operand.
+ ??? Split float truncates in fast_math mode too? */
+ rtx
+ i387_true_operand (operand)
+ rtx operand;
+ {
+ if (GET_CODE (operand) == FLOAT_EXTEND)
+ operand = XEXP (operand, 0);
+ return operand;
+ }
+ /* Returns 1 if OP is 387 register. */
+
+ int
+ i387_reg_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (mode != VOIDmode && mode != GET_MODE (op))
+ return 0;
+ op = i387_true_operand (op);
+ return (register_operand (op, GET_MODE (op)));
+ }
+
+ /* Returns 1 if op is top of stack register. */
+ int
+ i387_topreg_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (mode != VOIDmode && mode != GET_MODE (op))
+ return 0;
+ op = i387_true_operand (op);
+ return (register_operand (op, GET_MODE (op)));
+ }
+
+ /* Returns 1 if OP is 387 register. */
+
+ int
+ i387_output_reg_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (mode != VOIDmode && mode != GET_MODE (op))
+ return 0;
+ return (register_operand (op, mode));
+ }
+
+ /* Returns 1 if op is top of stack register. */
+ int
+ i387_output_topreg_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (mode != VOIDmode && mode != GET_MODE (op))
+ return 0;
+ return (register_operand (op, mode));
+ }
+
+ /* Returns 1 if op is top of stack register. */
+ int
+ i387_output_push_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (mode != VOIDmode && mode != GET_MODE (op))
+ return 0;
+ return (register_operand (op, mode));
+ }
+
+ /* Returns stack register and popping is allowed. */
+ int
+ i387_pop_reg_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (mode != VOIDmode && mode != GET_MODE (op))
+ return 0;
+ op = i387_true_operand (op);
+ return (register_operand (op, GET_MODE (op)));
+ }
+
+ /* Returns memory or stack register. */
+ int
+ i387_memreg_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (mode != VOIDmode && mode != GET_MODE (op))
+ return 0;
+ op = i387_true_operand (op);
+
+ /* In reload register operands may be turned into memory references
+ w/o warning so do not match registers before reload.
+ After reload we can happily match them and increase splitting/peepholing
+ possibilities. */
+
+ if (!reload_completed && GET_MODE (op) == XFmode)
+ return 0;
+ if (GET_MODE (op) == XFmode)
+ return (register_operand (op, GET_MODE (op)));
+ else
+ return (nonimmediate_operand (op, GET_MODE (op)));
+ }
+
+ /* Returns memory or stack register and popping is allowed. */
+ int
+ i387_pop_memreg_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ if (mode != VOIDmode && mode != GET_MODE (op))
+ return 0;
+ op = i387_true_operand (op);
+
+ /* In reload register operands may be turned into memory references
+ w/o warning so do not match registers before reload.
+ After reload we can happily match them and increase splitting/peepholing
+ possibilities. */
+
+ if (!reload_completed && GET_MODE (op) == XFmode)
+ return 0;
+ if (GET_MODE (op) == XFmode)
+ return (register_operand (op, GET_MODE (op)));
+ else
+ return (nonimmediate_operand (op, GET_MODE (op)));
+ }
+ /* Returns 1 if OP is operand for fld pattern. */
+
+ int
+ i387_move_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ return (general_operand (op, mode));
+ }
+
+ /* Returns 1 if OP is valis destination operand for fld pattern. */
+
+ int
+ i387_output_move_operand (op, mode)
+ register rtx op;
+ enum machine_mode mode;
+ {
+ return (nonimmediate_operand (op, mode));
+ }
+
+
/* Return true if the constant is something that can be loaded with
a special instruction. Only handle 0.0 and 1.0; others are less
worthwhile. */
*************** print_operand (file, x, code)
*** 2756,2761 ****
--- 2903,2911 ----
return;
case 'z':
+ /* Get trought extra float extends we ignore. */
+ x = i387_true_operand (x);
+
/* 387 opcodes don't get size suffixes if the operands are
registers. */
*************** print_operand (file, x, code)
*** 2847,2852 ****
--- 2997,3003 ----
}
}
+ x = i387_true_operand (x);
if (GET_CODE (x) == REG)
{
PRINT_REG (x, code, file);
*************** output_387_binary_op (insn, operands)
*** 3108,3113 ****
--- 3259,3266 ----
static char buf[100];
rtx temp;
const char *p;
+ operands[1] = i387_true_operand (operands[1]);
+ operands[2] = i387_true_operand (operands[2]);
switch (GET_CODE (operands[3]))
{
*************** output_fix_trunc (insn, operands)
*** 3260,3266 ****
if (dimode_p && !stack_top_dies)
output_asm_insn ("fld\t%y1", operands);
! if (! STACK_TOP_P (operands[1]))
abort ();
xops[0] = GEN_INT (12);
--- 3413,3419 ----
if (dimode_p && !stack_top_dies)
output_asm_insn ("fld\t%y1", operands);
! if (! STACK_TOP_P (i387_true_operand (operands[1])))
abort ();
xops[0] = GEN_INT (12);
*************** output_fp_compare (insn, operands, eflag
*** 3311,3323 ****
int eflags_p, unordered_p;
{
int stack_top_dies;
! rtx cmp_op0 = operands[0];
! rtx cmp_op1 = operands[1];
if (eflags_p == 2)
{
cmp_op0 = cmp_op1;
! cmp_op1 = operands[2];
}
if (! STACK_TOP_P (cmp_op0))
--- 3464,3476 ----
int eflags_p, unordered_p;
{
int stack_top_dies;
! rtx cmp_op0 = i387_true_operand (operands[0]);
! rtx cmp_op1 = i387_true_operand (operands[1]);
if (eflags_p == 2)
{
cmp_op0 = cmp_op1;
! cmp_op1 = i387_true_operand (operands[2]);
}
if (! STACK_TOP_P (cmp_op0))
Index: egcs/gcc/config/i386//i386.h
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.h,v
retrieving revision 1.86
diff -c -3 -p -r1.86 i386.h
*** i386.h 2000/01/04 14:44:03 1.86
--- i386.h 2000/01/04 18:34:19
*************** do { long l; \
*** 2447,2453 ****
{"memory_displacement_operand", {MEM}}, \
{"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
LABEL_REF, SUBREG, REG, MEM, AND}}, \
! {"long_memory_operand", {MEM}},
/* A list of predicates that do special things with modes, and so
should not elicit warnings for VOIDmode match_operand. */
--- 2447,2465 ----
{"memory_displacement_operand", {MEM}}, \
{"cmpsi_operand", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \
LABEL_REF, SUBREG, REG, MEM, AND}}, \
! {"long_memory_operand", {MEM}}, \
! {"i387_topreg_operand", {FLOAT_EXTEND, REG, SUBREG}}, \
! {"i387_reg_operand", {FLOAT_EXTEND, REG, SUBREG}}, \
! {"i387_memreg_operand", {FLOAT_EXTEND, REG, SUBREG, MEM}}, \
! {"i387_output_reg_operand", {REG, SUBREG}}, \
! {"i387_output_topreg_operand", {REG, SUBREG}}, \
! {"i387_output_push_operand", {REG, SUBREG}}, \
! {"i387_pop_reg_operand", {FLOAT_EXTEND, REG, SUBREG}}, \
! {"i387_pop_memreg_operand", {FLOAT_EXTEND, REG, SUBREG, \
! MEM}}, \
! {"i387_move_operand", {REG, SUBREG, CONST_INT, CONST_DOUBLE, \
! MEM, CONST}}, \
! {"i387_output_move_operand", {REG, SUBREG, MEM}},
/* A list of predicates that do special things with modes, and so
should not elicit warnings for VOIDmode match_operand. */
Index: egcs/gcc/config/i386//i386.md
===================================================================
RCS file: /cvs/gcc/egcs/gcc/config/i386/i386.md,v
retrieving revision 1.125
diff -c -3 -p -r1.125 i386.md
*** i386.md 2000/01/04 14:44:03 1.125
--- i386.md 2000/01/04 18:34:20
***************
*** 1053,1065 ****
(define_insn "*cmpfp_0"
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI
! [(compare:CCFP (match_operand 1 "register_operand" "f")
(match_operand 2 "const0_operand" "X"))] 9))]
"TARGET_80387
&& FLOAT_MODE_P (GET_MODE (operands[1]))
&& GET_MODE (operands[1]) == GET_MODE (operands[2])"
"*
{
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return \"ftst\;fnstsw\\t%0\;fstp\\t%y0\";
else
--- 1053,1066 ----
(define_insn "*cmpfp_0"
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI
! [(compare:CCFP (match_operand 1 "i387_pop_reg_operand" "f")
(match_operand 2 "const0_operand" "X"))] 9))]
"TARGET_80387
&& FLOAT_MODE_P (GET_MODE (operands[1]))
&& GET_MODE (operands[1]) == GET_MODE (operands[2])"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return \"ftst\;fnstsw\\t%0\;fstp\\t%y0\";
else
***************
*** 1070,1118 ****
;; We may not use "#" to split and emit these, since the REG_DEAD notes
;; used to manage the reg stack popping would not be preserved.
! (define_insn "*cmpfp_2_sf"
[(set (reg:CCFP 18)
(compare:CCFP
! (match_operand:SF 0 "register_operand" "f")
! (match_operand:SF 1 "nonimmediate_operand" "fm")))]
! "TARGET_80387"
"* return output_fp_compare (insn, operands, 0, 0);"
[(set_attr "type" "fcmp")])
! (define_insn "*cmpfp_2_sf_1"
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI
[(compare:CCFP
! (match_operand:SF 1 "register_operand" "f")
! (match_operand:SF 2 "nonimmediate_operand" "fm"))] 9))]
! "TARGET_80387"
"* return output_fp_compare (insn, operands, 2, 0);"
[(set_attr "type" "fcmp")])
- (define_insn "*cmpfp_2_df"
- [(set (reg:CCFP 18)
- (compare:CCFP
- (match_operand:DF 0 "register_operand" "f")
- (match_operand:DF 1 "nonimmediate_operand" "fm")))]
- "TARGET_80387"
- "* return output_fp_compare (insn, operands, 0, 0);"
- [(set_attr "type" "fcmp")])
-
- (define_insn "*cmpfp_2_df_1"
- [(set (match_operand:HI 0 "register_operand" "=a")
- (unspec:HI
- [(compare:CCFP
- (match_operand:DF 1 "register_operand" "f")
- (match_operand:DF 2 "nonimmediate_operand" "fm"))] 9))]
- "TARGET_80387"
- "* return output_fp_compare (insn, operands, 2, 0);"
- [(set_attr "type" "multi")])
-
(define_insn "*cmpfp_2_xf"
[(set (reg:CCFP 18)
(compare:CCFP
! (match_operand:XF 0 "register_operand" "f")
! (match_operand:XF 1 "register_operand" "f")))]
"TARGET_80387"
"* return output_fp_compare (insn, operands, 0, 0);"
[(set_attr "type" "fcmp")])
--- 1071,1104 ----
;; We may not use "#" to split and emit these, since the REG_DEAD notes
;; used to manage the reg stack popping would not be preserved.
! (define_insn "*cmpfp_2"
[(set (reg:CCFP 18)
(compare:CCFP
! (match_operand 0 "i387_pop_reg_operand" "f")
! (match_operand 1 "i387_memreg_operand" "fm")))]
! "TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return output_fp_compare (insn, operands, 0, 0);"
[(set_attr "type" "fcmp")])
! (define_insn "*cmpfp_2_1"
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI
[(compare:CCFP
! (match_operand 1 "i387_pop_reg_operand" "f")
! (match_operand 2 "i387_memreg_operand" "fm"))] 9))]
! "TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[1]))
! && GET_MODE (operands[1]) == GET_MODE (operands[2])"
"* return output_fp_compare (insn, operands, 2, 0);"
[(set_attr "type" "fcmp")])
(define_insn "*cmpfp_2_xf"
[(set (reg:CCFP 18)
(compare:CCFP
! (match_operand:XF 0 "i387_pop_reg_operand" "f")
! (match_operand:XF 1 "i387_reg_operand" "f")))]
"TARGET_80387"
"* return output_fp_compare (insn, operands, 0, 0);"
[(set_attr "type" "fcmp")])
***************
*** 1121,1128 ****
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI
[(compare:CCFP
! (match_operand:XF 1 "register_operand" "f")
! (match_operand:XF 2 "register_operand" "f"))] 9))]
"TARGET_80387"
"* return output_fp_compare (insn, operands, 2, 0);"
[(set_attr "type" "multi")])
--- 1107,1114 ----
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI
[(compare:CCFP
! (match_operand:XF 1 "i387_pop_reg_operand" "f")
! (match_operand:XF 2 "i387_reg_operand" "f"))] 9))]
"TARGET_80387"
"* return output_fp_compare (insn, operands, 2, 0);"
[(set_attr "type" "multi")])
***************
*** 1130,1137 ****
(define_insn "*cmpfp_2u"
[(set (reg:CCFPU 18)
(compare:CCFPU
! (match_operand 0 "register_operand" "f")
! (match_operand 1 "register_operand" "f")))]
"TARGET_80387
&& FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
--- 1116,1123 ----
(define_insn "*cmpfp_2u"
[(set (reg:CCFPU 18)
(compare:CCFPU
! (match_operand 0 "i387_pop_reg_operand" "f")
! (match_operand 1 "i387_reg_operand" "f")))]
"TARGET_80387
&& FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
***************
*** 1142,1149 ****
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI
[(compare:CCFPU
! (match_operand 1 "register_operand" "f")
! (match_operand 2 "register_operand" "f"))] 9))]
"TARGET_80387
&& FLOAT_MODE_P (GET_MODE (operands[1]))
&& GET_MODE (operands[1]) == GET_MODE (operands[2])"
--- 1128,1135 ----
[(set (match_operand:HI 0 "register_operand" "=a")
(unspec:HI
[(compare:CCFPU
! (match_operand 1 "i387_pop_reg_operand" "f")
! (match_operand 2 "i387_reg_operand" "f"))] 9))]
"TARGET_80387
&& FLOAT_MODE_P (GET_MODE (operands[1]))
&& GET_MODE (operands[1]) == GET_MODE (operands[2])"
***************
*** 1160,1166 ****
(define_insn "*ficom_1"
[(set (reg:CCFP 18)
(compare:CCFP
! (match_operand 0 "register_operand" "f,f")
(float (match_operand:SI 1 "nonimmediate_operand" "m,?r"))))]
"0 && TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == GET_MODE (operands[0])"
--- 1146,1152 ----
(define_insn "*ficom_1"
[(set (reg:CCFP 18)
(compare:CCFP
! (match_operand 0 "i387_reg_operand" "f,f")
(float (match_operand:SI 1 "nonimmediate_operand" "m,?r"))))]
"0 && TARGET_80387 && FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (XEXP (SET_SRC (PATTERN (insn)), 1)) == GET_MODE (operands[0])"
***************
*** 1175,1181 ****
(define_split
[(set (reg:CCFP 18)
(compare:CCFP
! (match_operand:SF 0 "register_operand" "")
(float (match_operand:SI 1 "register_operand" ""))))]
"0 && TARGET_80387 && reload_completed"
[(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 1))
--- 1161,1167 ----
(define_split
[(set (reg:CCFP 18)
(compare:CCFP
! (match_operand:SF 0 "i387_reg_operand" "")
(float (match_operand:SI 1 "register_operand" ""))))]
"0 && TARGET_80387 && reload_completed"
[(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 1))
***************
*** 1211,1218 ****
(define_insn "*cmpfp_i"
[(set (reg:CCFP 17)
! (compare:CCFP (match_operand 0 "register_operand" "f")
! (match_operand 1 "register_operand" "f")))]
"TARGET_80387 && TARGET_CMOVE
&& FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
--- 1197,1204 ----
(define_insn "*cmpfp_i"
[(set (reg:CCFP 17)
! (compare:CCFP (match_operand 0 "i387_pop_reg_operand" "f")
! (match_operand 1 "i387_reg_operand" "f")))]
"TARGET_80387 && TARGET_CMOVE
&& FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[0])"
***************
*** 1222,1229 ****
(define_insn "*cmpfp_iu"
[(set (reg:CCFPU 17)
! (compare:CCFPU (match_operand 0 "register_operand" "f")
! (match_operand 1 "register_operand" "f")))]
"TARGET_80387 && TARGET_CMOVE
&& FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
--- 1208,1215 ----
(define_insn "*cmpfp_iu"
[(set (reg:CCFPU 17)
! (compare:CCFPU (match_operand 0 "i387_pop_reg_operand" "f")
! (match_operand 1 "i387_reg_operand" "f")))]
"TARGET_80387 && TARGET_CMOVE
&& FLOAT_MODE_P (GET_MODE (operands[0]))
&& GET_MODE (operands[0]) == GET_MODE (operands[1])"
***************
*** 1696,1705 ****
(define_insn "*pushsf"
[(set (match_operand:SF 0 "push_operand" "=<,<")
! (match_operand:SF 1 "general_operand" "f#r,rFm#f"))]
""
"*
{
switch (which_alternative)
{
case 0:
--- 1682,1692 ----
(define_insn "*pushsf"
[(set (match_operand:SF 0 "push_operand" "=<,<")
! (match_operand:SF 1 "i387_move_operand" "f#r,rFm#f"))]
""
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 1736,1755 ****
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:SF 0 "push_operand" "")
! (match_operand:SF 1 "register_operand" ""))]
! "FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -4)))
(set (mem:SF (reg:SI 7)) (match_dup 1))])
(define_insn "*movsf_1"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=f#r,m,f#r,r#f,m")
! (match_operand:SF 1 "general_operand" "fm#r,f#r,G,rmF#f,Fr#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& (reload_in_progress || reload_completed
|| GET_CODE (operands[1]) != CONST_DOUBLE
|| memory_operand (operands[0], SFmode))"
"*
{
switch (which_alternative)
{
case 0:
--- 1723,1743 ----
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:SF 0 "push_operand" "")
! (match_operand:SF 1 "i387_pop_reg_operand" ""))]
! "FP_REGNO_P (REGNO (i387_true_operand (operands[1])))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -4)))
(set (mem:SF (reg:SI 7)) (match_dup 1))])
(define_insn "*movsf_1"
! [(set (match_operand:SF 0 "i387_output_move_operand" "=f#r,m,f#r,r#f,m")
! (match_operand:SF 1 "i387_move_operand" "fm#r,f#r,G,rmF#f,Fr#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& (reload_in_progress || reload_completed
|| GET_CODE (operands[1]) != CONST_DOUBLE
|| memory_operand (operands[0], SFmode))"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 1788,1794 ****
[(set_attr "type" "fmov,fmov,fmov,imov,imov")])
(define_split
! [(set (match_operand:SF 0 "general_operand" "")
(match_operand:SF 1 "memory_operand" ""))]
"reload_completed
&& GET_CODE (operands[1]) == MEM
--- 1776,1782 ----
[(set_attr "type" "fmov,fmov,fmov,imov,imov")])
(define_split
! [(set (match_operand:SF 0 "nonimmediate_operand" "")
(match_operand:SF 1 "memory_operand" ""))]
"reload_completed
&& GET_CODE (operands[1]) == MEM
***************
*** 1803,1810 ****
"operands[1] = get_pool_constant (XEXP (operands[1], 0));")
(define_insn "swapsf"
! [(set (match_operand:SF 0 "register_operand" "+f")
! (match_operand:SF 1 "register_operand" "+f"))
(set (match_dup 1)
(match_dup 0))]
""
--- 1791,1798 ----
"operands[1] = get_pool_constant (XEXP (operands[1], 0));")
(define_insn "swapsf"
! [(set (match_operand:SF 0 "i387_output_topreg_operand" "+f")
! (match_operand:SF 1 "i387_output_reg_operand" "+f"))
(set (match_dup 1)
(match_dup 0))]
""
***************
*** 1830,1839 ****
(define_insn "*pushdf"
[(set (match_operand:DF 0 "push_operand" "=<,<")
! (match_operand:DF 1 "general_operand" "f#r,rFo#f"))]
""
"*
{
switch (which_alternative)
{
case 0:
--- 1818,1828 ----
(define_insn "*pushdf"
[(set (match_operand:DF 0 "push_operand" "=<,<")
! (match_operand:DF 1 "i387_move_operand" "f#r,rFo#f"))]
""
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 1858,1864 ****
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (match_operand:DF 1 "register_operand" ""))]
"reload_completed && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
(set (mem:DF (reg:SI 7)) (match_dup 1))]
--- 1847,1853 ----
;; %%% Kill this when call knows how to work this out.
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (match_operand:DF 1 "i387_pop_reg_operand" ""))]
"reload_completed && FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
(set (mem:DF (reg:SI 7)) (match_dup 1))]
***************
*** 1876,1883 ****
;; when optimizing for size.
(define_insn "*movdf_nointeger"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m,f,*r,o")
! (match_operand:DF 1 "general_operand" "fm,f,G,*roF,F*r"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& optimize_size
&& (reload_in_progress || reload_completed
--- 1865,1872 ----
;; when optimizing for size.
(define_insn "*movdf_nointeger"
! [(set (match_operand:DF 0 "i387_output_move_operand" "=f,m,f,*r,o")
! (match_operand:DF 1 "i387_move_operand" "fm,f,G,*roF,F*r"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& optimize_size
&& (reload_in_progress || reload_completed
***************
*** 1885,1890 ****
--- 1874,1880 ----
|| memory_operand (operands[0], DFmode))"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 1923,1930 ****
[(set_attr "type" "fmov,fmov,fmov,multi,multi")])
(define_insn "*movdf_integer"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f#r,m,f#r,r#f,o")
! (match_operand:DF 1 "general_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size
&& (reload_in_progress || reload_completed
--- 1913,1920 ----
[(set_attr "type" "fmov,fmov,fmov,multi,multi")])
(define_insn "*movdf_integer"
! [(set (match_operand:DF 0 "i387_output_move_operand" "=f#r,m,f#r,r#f,o")
! (match_operand:DF 1 "i387_move_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size
&& (reload_in_progress || reload_completed
***************
*** 1932,1937 ****
--- 1922,1928 ----
|| memory_operand (operands[0], DFmode))"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 1985,1991 ****
"if (ix86_split_long_move (operands)) DONE;")
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(match_operand:DF 1 "memory_operand" ""))]
"reload_completed
&& GET_CODE (operands[1]) == MEM
--- 1976,1982 ----
"if (ix86_split_long_move (operands)) DONE;")
(define_split
! [(set (match_operand:DF 0 "i387_output_reg_operand" "")
(match_operand:DF 1 "memory_operand" ""))]
"reload_completed
&& GET_CODE (operands[1]) == MEM
***************
*** 1997,2004 ****
"operands[1] = get_pool_constant (XEXP (operands[1], 0));")
(define_insn "swapdf"
! [(set (match_operand:DF 0 "register_operand" "+f")
! (match_operand:DF 1 "register_operand" "+f"))
(set (match_dup 1)
(match_dup 0))]
""
--- 1988,1995 ----
"operands[1] = get_pool_constant (XEXP (operands[1], 0));")
(define_insn "swapdf"
! [(set (match_operand:DF 0 "i387_output_topreg_operand" "+f")
! (match_operand:DF 1 "i387_output_reg_operand" "+f"))
(set (match_dup 1)
(match_dup 0))]
""
***************
*** 2026,2035 ****
(define_insn "*pushxf_nointeger"
[(set (match_operand:XF 0 "push_operand" "=<,<,<")
! (match_operand:XF 1 "general_operand" "f,Fo,*r"))]
"optimize_size"
"*
{
switch (which_alternative)
{
case 0:
--- 2017,2027 ----
(define_insn "*pushxf_nointeger"
[(set (match_operand:XF 0 "push_operand" "=<,<,<")
! (match_operand:XF 1 "i387_move_operand" "f,Fo,*r"))]
"optimize_size"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2054,2063 ****
(define_insn "*pushxf_integer"
[(set (match_operand:XF 0 "push_operand" "=<,<")
! (match_operand:XF 1 "general_operand" "f#r,rFo#f"))]
"!optimize_size"
"*
{
switch (which_alternative)
{
case 0:
--- 2046,2056 ----
(define_insn "*pushxf_integer"
[(set (match_operand:XF 0 "push_operand" "=<,<")
! (match_operand:XF 1 "i387_move_operand" "f#r,rFo#f"))]
"!optimize_size"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2089,2103 ****
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (match_operand:XF 1 "register_operand" ""))]
"FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:XF (reg:SI 7)) (match_dup 1))])
;; Do not use integer registers when optimizing for size
(define_insn "*movxf_nointeger"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m,f,*r,o")
! (match_operand:XF 1 "general_operand" "fm,f,G,*roF,F*r"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& optimize_size
&& (reload_in_progress || reload_completed
--- 2082,2096 ----
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (match_operand:XF 1 "i387_move_operand" ""))]
"FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:XF (reg:SI 7)) (match_dup 1))])
;; Do not use integer registers when optimizing for size
(define_insn "*movxf_nointeger"
! [(set (match_operand:XF 0 "i387_output_move_operand" "=f,m,f,*r,o")
! (match_operand:XF 1 "i387_move_operand" "fm,f,G,*roF,F*r"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& optimize_size
&& (reload_in_progress || reload_completed
***************
*** 2105,2110 ****
--- 2098,2104 ----
|| memory_operand (operands[0], XFmode))"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2142,2149 ****
[(set_attr "type" "fmov,fmov,fmov,multi,multi")])
(define_insn "*movxf_integer"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f#r,m,f#r,r#f,o")
! (match_operand:XF 1 "general_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size
&& (reload_in_progress || reload_completed
--- 2136,2143 ----
[(set_attr "type" "fmov,fmov,fmov,multi,multi")])
(define_insn "*movxf_integer"
! [(set (match_operand:XF 0 "i387_output_move_operand" "=f#r,m,f#r,r#f,o")
! (match_operand:XF 1 "i387_move_operand" "fm#r,f#r,G,roF#f,Fr#f"))]
"(GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)
&& !optimize_size
&& (reload_in_progress || reload_completed
***************
*** 2151,2156 ****
--- 2145,2151 ----
|| memory_operand (operands[0], XFmode))"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2577,2616 ****
;; %%% Kill these when call knows how to work out a DFmode push earlier.
(define_insn "*dummy_extendsfdf2"
[(set (match_operand:DF 0 "push_operand" "=<")
! (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "f")))]
"0"
"#")
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (float_extend:DF (match_operand:SF 1 "register_operand" "")))]
! "FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
(set (mem:DF (reg:SI 7)) (float_extend:DF (match_dup 1)))])
(define_insn "*dummy_extendsfxf2"
[(set (match_operand:XF 0 "push_operand" "=<")
! (float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "f")))]
"0"
"#")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (float_extend:XF (match_operand:SF 1 "register_operand" "")))]
! "FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:DF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
(define_insn "*dummy_extenddfxf2"
[(set (match_operand:XF 0 "push_operand" "=<")
! (float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "f")))]
"0"
"#")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (float_extend:XF (match_operand:DF 1 "register_operand" "")))]
! "FP_REGNO_P (REGNO (operands[1]))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:DF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
--- 2572,2611 ----
;; %%% Kill these when call knows how to work out a DFmode push earlier.
(define_insn "*dummy_extendsfdf2"
[(set (match_operand:DF 0 "push_operand" "=<")
! (float_extend:DF (match_operand:SF 1 "i387_topreg_operand" "f")))]
"0"
"#")
(define_split
[(set (match_operand:DF 0 "push_operand" "")
! (float_extend:DF (match_operand:SF 1 "i387_topreg_operand" "")))]
! "FP_REGNO_P (REGNO (i387_true_operand (operands[1])))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -8)))
(set (mem:DF (reg:SI 7)) (float_extend:DF (match_dup 1)))])
(define_insn "*dummy_extendsfxf2"
[(set (match_operand:XF 0 "push_operand" "=<")
! (float_extend:XF (match_operand:SF 1 "i387_move_operand" "f")))]
"0"
"#")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (float_extend:XF (match_operand:SF 1 "i387_topreg_operand" "")))]
! "FP_REGNO_P (REGNO (i387_true_operand (operands[1])))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:DF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
(define_insn "*dummy_extenddfxf2"
[(set (match_operand:XF 0 "push_operand" "=<")
! (float_extend:XF (match_operand:DF 1 "i387_move_operand" "f")))]
"0"
"#")
(define_split
[(set (match_operand:XF 0 "push_operand" "")
! (float_extend:XF (match_operand:DF 1 "i387_topreg_operand" "")))]
! "FP_REGNO_P (REGNO (i387_true_operand (operands[1])))"
[(set (reg:SI 7) (plus:SI (reg:SI 7) (const_int -12)))
(set (mem:DF (reg:SI 7)) (float_extend:XF (match_dup 1)))])
***************
*** 2625,2636 ****
}")
(define_insn "*extendsfdf2_1"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=f,m")
! (float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))]
"TARGET_80387
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"*
{
switch (which_alternative)
{
case 0:
--- 2620,2633 ----
}")
(define_insn "*extendsfdf2_1"
! [(set (match_operand:DF 0 "i387_output_move_operand" "=f,m")
! (float_extend:DF (match_operand:SF 1 "i387_pop_memreg_operand" "fm,f")))]
"TARGET_80387
! && (GET_CODE (operands[0]) != MEM
! || GET_CODE (i387_true_operand (operands[1])) != MEM)"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2666,2677 ****
}")
(define_insn "*extendsfxf2_1"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m")
! (float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "fm,f")))]
"TARGET_80387
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"*
{
switch (which_alternative)
{
case 0:
--- 2663,2676 ----
}")
(define_insn "*extendsfxf2_1"
! [(set (match_operand:XF 0 "i387_output_move_operand" "=f,m")
! (float_extend:XF (match_operand:SF 1 "i387_pop_memreg_operand" "fm,f")))]
"TARGET_80387
! && (GET_CODE (operands[0]) != MEM
! || GET_CODE (i387_true_operand (operands[1])) != MEM)"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2708,2719 ****
}")
(define_insn "*extenddfxf2_1"
! [(set (match_operand:XF 0 "nonimmediate_operand" "=f,m")
! (float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "fm,f")))]
"TARGET_80387
! && (GET_CODE (operands[0]) != MEM || GET_CODE (operands[1]) != MEM)"
"*
{
switch (which_alternative)
{
case 0:
--- 2707,2720 ----
}")
(define_insn "*extenddfxf2_1"
! [(set (match_operand:XF 0 "i387_output_move_operand" "=f,m")
! (float_extend:XF (match_operand:DF 1 "i387_pop_memreg_operand" "fm,f")))]
"TARGET_80387
! && (GET_CODE (operands[0]) != MEM
! || GET_CODE (i387_true_operand (operands[1])) != MEM)"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2754,2766 ****
"operands[2] = assign_386_stack_local (SFmode, 0);")
(define_insn "*truncdfsf2_1"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=m,f")
(float_truncate:SF
! (match_operand:DF 1 "register_operand" "f,0")))
(clobber (match_operand:SF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
switch (which_alternative)
{
case 0:
--- 2755,2768 ----
"operands[2] = assign_386_stack_local (SFmode, 0);")
(define_insn "*truncdfsf2_1"
! [(set (match_operand:SF 0 "i387_output_move_operand" "=m,f")
(float_truncate:SF
! (match_operand:DF 1 "i387_pop_reg_operand" "f,0")))
(clobber (match_operand:SF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2778,2787 ****
(define_insn "*truncdfsf2_2"
[(set (match_operand:SF 0 "memory_operand" "=m")
(float_truncate:SF
! (match_operand:DF 1 "register_operand" "f")))]
"TARGET_80387"
"*
{
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return \"fstp%z0\\t%y0\";
else
--- 2780,2790 ----
(define_insn "*truncdfsf2_2"
[(set (match_operand:SF 0 "memory_operand" "=m")
(float_truncate:SF
! (match_operand:DF 1 "i387_pop_reg_operand" "f")))]
"TARGET_80387"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return \"fstp%z0\\t%y0\";
else
***************
*** 2792,2807 ****
(define_split
[(set (match_operand:SF 0 "memory_operand" "")
(float_truncate:SF
! (match_operand:DF 1 "register_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
"TARGET_80387"
[(set (match_dup 0) (float_truncate:SF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:SF 0 "register_operand" "")
(float_truncate:SF
! (match_operand:DF 1 "register_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
"TARGET_80387 && reload_completed"
[(set (match_dup 2) (float_truncate:SF (match_dup 1)))
--- 2795,2810 ----
(define_split
[(set (match_operand:SF 0 "memory_operand" "")
(float_truncate:SF
! (match_operand:DF 1 "i387_pop_reg_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
"TARGET_80387"
[(set (match_dup 0) (float_truncate:SF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:SF 0 "i387_output_reg_operand" "")
(float_truncate:SF
! (match_operand:DF 1 "i387_pop_reg_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
"TARGET_80387 && reload_completed"
[(set (match_dup 2) (float_truncate:SF (match_dup 1)))
***************
*** 2817,2829 ****
"operands[2] = assign_386_stack_local (SFmode, 0);")
(define_insn "*truncxfsf2_1"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=m,f")
(float_truncate:SF
! (match_operand:XF 1 "register_operand" "f,0")))
(clobber (match_operand:SF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
switch (which_alternative)
{
case 0:
--- 2820,2833 ----
"operands[2] = assign_386_stack_local (SFmode, 0);")
(define_insn "*truncxfsf2_1"
! [(set (match_operand:SF 0 "i387_output_move_operand" "=m,f")
(float_truncate:SF
! (match_operand:XF 1 "i387_pop_reg_operand" "f,0")))
(clobber (match_operand:SF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2839,2850 ****
[(set_attr "type" "fmov,multi")])
(define_insn "*truncxfsf2_2"
! [(set (match_operand:SF 0 "nonimmediate_operand" "=m")
(float_truncate:SF
! (match_operand:XF 1 "register_operand" "f")))]
"TARGET_80387"
"*
{
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return \"fstp%z0\\t%y0\";
else
--- 2843,2855 ----
[(set_attr "type" "fmov,multi")])
(define_insn "*truncxfsf2_2"
! [(set (match_operand:SF 0 "memory_operand" "=m")
(float_truncate:SF
! (match_operand:XF 1 "i387_pop_reg_operand" "f")))]
"TARGET_80387"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return \"fstp%z0\\t%y0\";
else
***************
*** 2855,2870 ****
(define_split
[(set (match_operand:SF 0 "memory_operand" "")
(float_truncate:SF
! (match_operand:XF 1 "register_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
"TARGET_80387"
[(set (match_dup 0) (float_truncate:SF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:SF 0 "register_operand" "")
(float_truncate:SF
! (match_operand:XF 1 "register_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
"TARGET_80387 && reload_completed"
[(set (match_dup 2) (float_truncate:SF (match_dup 1)))
--- 2860,2875 ----
(define_split
[(set (match_operand:SF 0 "memory_operand" "")
(float_truncate:SF
! (match_operand:XF 1 "i387_pop_reg_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
"TARGET_80387"
[(set (match_dup 0) (float_truncate:SF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:SF 0 "i387_output_reg_operand" "")
(float_truncate:SF
! (match_operand:XF 1 "i387_pop_reg_operand" "")))
(clobber (match_operand:SF 2 "memory_operand" ""))]
"TARGET_80387 && reload_completed"
[(set (match_dup 2) (float_truncate:SF (match_dup 1)))
***************
*** 2880,2892 ****
"operands[2] = assign_386_stack_local (DFmode, 0);")
(define_insn "*truncxfdf2_1"
! [(set (match_operand:DF 0 "nonimmediate_operand" "=m,f")
(float_truncate:DF
! (match_operand:XF 1 "register_operand" "f,0")))
(clobber (match_operand:DF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
switch (which_alternative)
{
case 0:
--- 2885,2898 ----
"operands[2] = assign_386_stack_local (DFmode, 0);")
(define_insn "*truncxfdf2_1"
! [(set (match_operand:DF 0 "i387_output_move_operand" "=m,f")
(float_truncate:DF
! (match_operand:XF 1 "i387_pop_reg_operand" "f,0")))
(clobber (match_operand:DF 2 "memory_operand" "=m,m"))]
"TARGET_80387"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
switch (which_alternative)
{
case 0:
***************
*** 2904,2913 ****
(define_insn "*truncxfdf2_2"
[(set (match_operand:DF 0 "memory_operand" "=m")
(float_truncate:DF
! (match_operand:XF 1 "register_operand" "f")))]
"TARGET_80387"
"*
{
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return \"fstp%z0\\t%y0\";
else
--- 2910,2920 ----
(define_insn "*truncxfdf2_2"
[(set (match_operand:DF 0 "memory_operand" "=m")
(float_truncate:DF
! (match_operand:XF 1 "i387_pop_reg_operand" "f")))]
"TARGET_80387"
"*
{
+ operands[1] = i387_true_operand (operands[1]);
if (find_regno_note (insn, REG_DEAD, REGNO (operands[1])))
return \"fstp%z0\\t%y0\";
else
***************
*** 2918,2933 ****
(define_split
[(set (match_operand:DF 0 "memory_operand" "")
(float_truncate:DF
! (match_operand:XF 1 "register_operand" "")))
(clobber (match_operand:DF 2 "memory_operand" ""))]
"TARGET_80387"
[(set (match_dup 0) (float_truncate:DF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:DF 0 "register_operand" "")
(float_truncate:DF
! (match_operand:XF 1 "register_operand" "")))
(clobber (match_operand:DF 2 "memory_operand" ""))]
"TARGET_80387 && reload_completed"
[(set (match_dup 2) (float_truncate:DF (match_dup 1)))
--- 2925,2940 ----
(define_split
[(set (match_operand:DF 0 "memory_operand" "")
(float_truncate:DF
! (match_operand:XF 1 "i387_pop_reg_operand" "")))
(clobber (match_operand:DF 2 "memory_operand" ""))]
"TARGET_80387"
[(set (match_dup 0) (float_truncate:DF (match_dup 1)))]
"")
(define_split
! [(set (match_operand:DF 0 "i387_output_reg_operand" "")
(float_truncate:DF
! (match_operand:XF 1 "i387_pop_reg_operand" "")))
(clobber (match_operand:DF 2 "memory_operand" ""))]
"TARGET_80387 && reload_completed"
[(set (match_dup 2) (float_truncate:DF (match_dup 1)))
***************
*** 2974,2980 ****
(define_insn "*fix_truncdi_1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r")
! (fix:DI (match_operand 1 "register_operand" "f,f")))
(clobber (match_operand:SI 2 "memory_operand" "=o,o"))
(clobber (match_operand:DI 3 "memory_operand" "=m,m"))
(clobber (match_scratch:SI 4 "=&r,&r"))
--- 2981,2987 ----
(define_insn "*fix_truncdi_1"
[(set (match_operand:DI 0 "nonimmediate_operand" "=m,?r")
! (fix:DI (match_operand 1 "i387_topreg_operand" "f,f")))
(clobber (match_operand:SI 2 "memory_operand" "=o,o"))
(clobber (match_operand:DI 3 "memory_operand" "=m,m"))
(clobber (match_scratch:SI 4 "=&r,&r"))
***************
*** 2985,2991 ****
(define_split
[(set (match_operand:DI 0 "register_operand" "")
! (fix:DI (match_operand 1 "register_operand" "")))
(clobber (match_operand:SI 2 "memory_operand" ""))
(clobber (match_operand:DI 3 "memory_operand" ""))
(clobber (match_scratch:SI 4 ""))
--- 2992,2998 ----
(define_split
[(set (match_operand:DI 0 "register_operand" "")
! (fix:DI (match_operand 1 "i387_topreg_operand" "")))
(clobber (match_operand:SI 2 "memory_operand" ""))
(clobber (match_operand:DI 3 "memory_operand" ""))
(clobber (match_scratch:SI 4 ""))
***************
*** 3033,3039 ****
(define_insn "*fix_truncsi_1"
[(set (match_operand:SI 0 "nonimmediate_operand" "=m,?r")
! (fix:SI (match_operand 1 "register_operand" "f,f")))
(clobber (match_operand:SI 2 "memory_operand" "=o,o"))
(clobber (match_operand:SI 3 "memory_operand" "=m,m"))
(clobber (match_scratch:SI 4 "=&r,r"))]
--- 3040,3046 ----
(define_insn "*fix_truncsi_1"
[(set (match_operand:SI 0 "nonimmediate_operand" "=m,?r")
! (fix:SI (match_operand 1 "i387_topreg_operand" "f,f")))
(clobber (match_operand:SI 2 "memory_operand" "=o,o"))
(clobber (match_operand:SI 3 "memory_operand" "=m,m"))
(clobber (match_scratch:SI 4 "=&r,r"))]
***************
*** 3043,3049 ****
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (fix:SI (match_operand 1 "register_operand" "")))
(clobber (match_operand:SI 2 "memory_operand" ""))
(clobber (match_operand:SI 3 "memory_operand" ""))
(clobber (match_scratch:SI 4 ""))]
--- 3050,3056 ----
(define_split
[(set (match_operand:SI 0 "register_operand" "")
! (fix:SI (match_operand 1 "i387_topreg_operand" "")))
(clobber (match_operand:SI 2 "memory_operand" ""))
(clobber (match_operand:SI 3 "memory_operand" ""))
(clobber (match_scratch:SI 4 ""))]
***************
*** 3078,3084 ****
;; wants to be able to do this between registers.
(define_insn "floatsisf2"
! [(set (match_operand:SF 0 "register_operand" "=f,f")
(float:SF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
--- 3085,3091 ----
;; wants to be able to do this between registers.
(define_insn "floatsisf2"
! [(set (match_operand:SF 0 "i387_output_push_operand" "=f,f")
(float:SF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
***************
*** 3088,3094 ****
(set_attr "fp_int_src" "true")])
(define_insn "floatdisf2"
! [(set (match_operand:SF 0 "register_operand" "=f,f")
(float:SF (match_operand:DI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
--- 3095,3101 ----
(set_attr "fp_int_src" "true")])
(define_insn "floatdisf2"
! [(set (match_operand:SF 0 "i387_output_push_operand" "=f,f")
(float:SF (match_operand:DI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
***************
*** 3098,3104 ****
(set_attr "fp_int_src" "true")])
(define_insn "floatsidf2"
! [(set (match_operand:DF 0 "register_operand" "=f,f")
(float:DF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
--- 3105,3111 ----
(set_attr "fp_int_src" "true")])
(define_insn "floatsidf2"
! [(set (match_operand:DF 0 "i387_output_push_operand" "=f,f")
(float:DF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
***************
*** 3108,3114 ****
(set_attr "fp_int_src" "true")])
(define_insn "floatdidf2"
! [(set (match_operand:DF 0 "register_operand" "=f,f")
(float:DF (match_operand:DI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
--- 3115,3121 ----
(set_attr "fp_int_src" "true")])
(define_insn "floatdidf2"
! [(set (match_operand:DF 0 "i387_output_push_operand" "=f,f")
(float:DF (match_operand:DI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
***************
*** 3118,3124 ****
(set_attr "fp_int_src" "true")])
(define_insn "floatsixf2"
! [(set (match_operand:XF 0 "register_operand" "=f,f")
(float:XF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
--- 3125,3131 ----
(set_attr "fp_int_src" "true")])
(define_insn "floatsixf2"
! [(set (match_operand:XF 0 "i387_output_push_operand" "=f,f")
(float:XF (match_operand:SI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
***************
*** 3128,3134 ****
(set_attr "fp_int_src" "true")])
(define_insn "floatdixf2"
! [(set (match_operand:XF 0 "register_operand" "=f,f")
(float:XF (match_operand:DI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
--- 3135,3141 ----
(set_attr "fp_int_src" "true")])
(define_insn "floatdixf2"
! [(set (match_operand:XF 0 "i387_output_push_operand" "=f,f")
(float:XF (match_operand:DI 1 "nonimmediate_operand" "m,r")))]
"TARGET_80387"
"@
***************
*** 3139,3145 ****
;; %%% Kill these when reload knows how to do it.
(define_split
! [(set (match_operand 0 "register_operand" "")
(float (match_operand:SI 1 "register_operand" "")))]
"reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))"
[(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 1))
--- 3146,3152 ----
;; %%% Kill these when reload knows how to do it.
(define_split
! [(set (match_operand 0 "i387_output_push_operand" "")
(float (match_operand:SI 1 "register_operand" "")))]
"reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))"
[(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 1))
***************
*** 3150,3156 ****
gen_rtx_MEM (SImode, stack_pointer_rtx));")
(define_split
! [(set (match_operand 0 "register_operand" "")
(float (match_operand:DI 1 "nonmemory_operand" "")))]
"reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))"
[(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 2))
--- 3157,3163 ----
gen_rtx_MEM (SImode, stack_pointer_rtx));")
(define_split
! [(set (match_operand 0 "i387_output_push_operand" "")
(float (match_operand:DI 1 "nonmemory_operand" "")))]
"reload_completed && FLOAT_MODE_P (GET_MODE (operands[0]))"
[(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 2))
***************
*** 5118,5171 ****
;; Conditionize these after reload. If they matches before reload, we
;; lose the clobber and ability to use integer instructions.
-
- (define_insn "*negsf2_1"
- [(set (match_operand:SF 0 "register_operand" "=f")
- (neg:SF (match_operand:SF 1 "register_operand" "0")))]
- "TARGET_80387 && reload_completed"
- "fchs"
- [(set_attr "type" "fsgn")
- (set_attr "ppro_uops" "few")])
-
- (define_insn "*negdf2_1"
- [(set (match_operand:DF 0 "register_operand" "=f")
- (neg:DF (match_operand:DF 1 "register_operand" "0")))]
- "TARGET_80387 && reload_completed"
- "fchs"
- [(set_attr "type" "fsgn")
- (set_attr "ppro_uops" "few")])
-
- (define_insn "*negextendsfdf2"
- [(set (match_operand:DF 0 "register_operand" "=f")
- (neg:DF (float_extend:DF
- (match_operand:SF 1 "register_operand" "0"))))]
- "TARGET_80387"
- "fchs"
- [(set_attr "type" "fsgn")
- (set_attr "ppro_uops" "few")])
-
- (define_insn "*negxf2_1"
- [(set (match_operand:XF 0 "register_operand" "=f")
- (neg:XF (match_operand:XF 1 "register_operand" "0")))]
- "TARGET_80387 && reload_completed"
- "fchs"
- [(set_attr "type" "fsgn")
- (set_attr "ppro_uops" "few")])
-
- (define_insn "*negextenddfxf2"
- [(set (match_operand:XF 0 "register_operand" "=f")
- (neg:XF (float_extend:XF
- (match_operand:DF 1 "register_operand" "0"))))]
- "TARGET_80387"
- "fchs"
- [(set_attr "type" "fsgn")
- (set_attr "ppro_uops" "few")])
! (define_insn "*negextendsfxf2"
! [(set (match_operand:XF 0 "register_operand" "=f")
! (neg:XF (float_extend:XF
! (match_operand:SF 1 "register_operand" "0"))))]
! "TARGET_80387"
"fchs"
[(set_attr "type" "fsgn")
(set_attr "ppro_uops" "few")])
--- 5125,5138 ----
;; Conditionize these after reload. If they matches before reload, we
;; lose the clobber and ability to use integer instructions.
! (define_insn "*neg_float"
! [(set (match_operand 0 "i387_output_topreg_operand" "=f")
! (neg (match_operand 1 "i387_topreg_operand" "0")))]
! "TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])
! && (!register_operand (operands[1], VOIDmode) || reload_completed)"
"fchs"
[(set_attr "type" "fsgn")
(set_attr "ppro_uops" "few")])
***************
*** 5298,5346 ****
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (~0x8000);
operands[0] = gen_rtx_REG (SImode, true_regnum (operands[0]) + 2);")
-
- (define_insn "*abssf2_1"
- [(set (match_operand:SF 0 "register_operand" "=f")
- (abs:SF (match_operand:SF 1 "register_operand" "0")))]
- "TARGET_80387 && reload_completed"
- "fabs"
- [(set_attr "type" "fsgn")])
-
- (define_insn "*absdf2_1"
- [(set (match_operand:DF 0 "register_operand" "=f")
- (abs:DF (match_operand:DF 1 "register_operand" "0")))]
- "TARGET_80387 && reload_completed"
- "fabs"
- [(set_attr "type" "fsgn")])
! (define_insn "*absextendsfdf2"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (abs:DF (float_extend:DF
! (match_operand:SF 1 "register_operand" "0"))))]
! "TARGET_80387"
! "fabs"
! [(set_attr "type" "fsgn")])
!
! (define_insn "*absxf2_1"
! [(set (match_operand:XF 0 "register_operand" "=f")
! (abs:XF (match_operand:XF 1 "register_operand" "0")))]
! "TARGET_80387 && reload_completed"
! "fabs"
! [(set_attr "type" "fsgn")])
!
! (define_insn "*absextenddfxf2"
! [(set (match_operand:XF 0 "register_operand" "=f")
! (abs:XF (float_extend:XF
! (match_operand:DF 1 "register_operand" "0"))))]
! "TARGET_80387"
! "fabs"
! [(set_attr "type" "fsgn")])
!
! (define_insn "*absextendsfxf2"
! [(set (match_operand:XF 0 "register_operand" "=f")
! (abs:XF (float_extend:XF
! (match_operand:SF 1 "register_operand" "0"))))]
! "TARGET_80387"
"fabs"
[(set_attr "type" "fsgn")])
--- 5265,5278 ----
(clobber (reg:CC 17))])]
"operands[1] = GEN_INT (~0x8000);
operands[0] = gen_rtx_REG (SImode, true_regnum (operands[0]) + 2);")
! (define_insn "*abs_float"
! [(set (match_operand 0 "i387_output_topreg_operand" "=f")
! (abs (match_operand 1 "i387_topreg_operand" "0")))]
! "TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])
! && (!register_operand (operands[1], VOIDmode) || reload_completed)"
"fabs"
[(set_attr "type" "fsgn")])
***************
*** 7368,7660 ****
;; Gcc is slightly more smart about handling normal two address instructions
;; so use special patterns for add and mull.
! (define_insn "*fop_sf_comm"
! [(set (match_operand:SF 0 "register_operand" "=f")
! (match_operator:SF 3 "binary_fp_operator"
! [(match_operand:SF 1 "register_operand" "%0")
! (match_operand:SF 2 "nonimmediate_operand" "fm")]))]
! "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
! "* return output_387_binary_op (insn, operands);"
! [(set (attr "type")
! (if_then_else (match_operand:SF 3 "mult_operator" "")
! (const_string "fmul")
! (const_string "fop")))])
!
! (define_insn "*fop_df_comm"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (match_operator:DF 3 "binary_fp_operator"
! [(match_operand:DF 1 "register_operand" "%0")
! (match_operand:DF 2 "nonimmediate_operand" "fm")]))]
! "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (if_then_else (match_operand:DF 3 "mult_operator" "")
(const_string "fmul")
(const_string "fop")))])
! (define_insn "*fop_xf_comm"
! [(set (match_operand:XF 0 "register_operand" "=f")
! (match_operator:XF 3 "binary_fp_operator"
! [(match_operand:XF 1 "register_operand" "%0")
! (match_operand:XF 2 "register_operand" "f")]))]
! "TARGET_80387 && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (if_then_else (match_operand:XF 3 "mult_operator" "")
(const_string "fmul")
(const_string "fop")))])
! (define_insn "*fop_sf_1"
! [(set (match_operand:SF 0 "register_operand" "=f,f")
! (match_operator:SF 3 "binary_fp_operator"
! [(match_operand:SF 1 "nonimmediate_operand" "0,fm")
! (match_operand:SF 2 "nonimmediate_operand" "fm,0")]))]
"TARGET_80387
! && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
! && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand:SF 3 "mult_operator" "")
(const_string "fmul")
! (match_operand:SF 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))])
-
- (define_insn "*fop_sf_2"
- [(set (match_operand:SF 0 "register_operand" "=f,f")
- (match_operator:SF 3 "binary_fp_operator"
- [(float:SF (match_operand:SI 1 "nonimmediate_operand" "m,?r"))
- (match_operand:SF 2 "register_operand" "0,0")]))]
- "TARGET_80387 && TARGET_USE_FIOP"
- "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:SF 3 "mult_operator" "")
- (const_string "fmul")
- (match_operand:SF 3 "div_operator" "")
- (const_string "fdiv")
- ]
- (const_string "fop")))
- (set_attr "fp_int_src" "true")
- (set_attr "ppro_uops" "many")])
-
- (define_insn "*fop_sf_3"
- [(set (match_operand:SF 0 "register_operand" "=f,f")
- (match_operator:SF 3 "binary_fp_operator"
- [(match_operand:SF 1 "register_operand" "0,0")
- (float:SF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))]
- "TARGET_80387 && TARGET_USE_FIOP"
- "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:SF 3 "mult_operator" "")
- (const_string "fmul")
- (match_operand:SF 3 "div_operator" "")
- (const_string "fdiv")
- ]
- (const_string "fop")))
- (set_attr "fp_int_src" "true")
- (set_attr "ppro_uops" "many")])
! (define_insn "*fop_df_1"
! [(set (match_operand:DF 0 "register_operand" "=f,f")
! (match_operator:DF 3 "binary_fp_operator"
! [(match_operand:DF 1 "nonimmediate_operand" "0,fm")
! (match_operand:DF 2 "nonimmediate_operand" "fm,0")]))]
"TARGET_80387
! && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'
! && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand:DF 3 "mult_operator" "")
(const_string "fmul")
! (match_operand:DF 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))])
-
- (define_insn "*fop_df_2"
- [(set (match_operand:DF 0 "register_operand" "=f,f")
- (match_operator:DF 3 "binary_fp_operator"
- [(float:DF (match_operand:SI 1 "nonimmediate_operand" "m,?r"))
- (match_operand:DF 2 "register_operand" "0,0")]))]
- "TARGET_80387 && TARGET_USE_FIOP"
- "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:DF 3 "mult_operator" "")
- (const_string "fmul")
- (match_operand:DF 3 "div_operator" "")
- (const_string "fdiv")
- ]
- (const_string "fop")))
- (set_attr "fp_int_src" "true")
- (set_attr "ppro_uops" "many")])
-
- (define_insn "*fop_df_3"
- [(set (match_operand:DF 0 "register_operand" "=f,f")
- (match_operator:DF 3 "binary_fp_operator"
- [(match_operand:DF 1 "register_operand" "0,0")
- (float:DF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))]
- "TARGET_80387 && TARGET_USE_FIOP"
- "* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:DF 3 "mult_operator" "")
- (const_string "fmul")
- (match_operand:DF 3 "div_operator" "")
- (const_string "fdiv")
- ]
- (const_string "fop")))
- (set_attr "fp_int_src" "true")
- (set_attr "ppro_uops" "many")])
! (define_insn "*fop_df_4"
! [(set (match_operand:DF 0 "register_operand" "=f,f")
! (match_operator:DF 3 "binary_fp_operator"
! [(float_extend:DF (match_operand:SF 1 "nonimmediate_operand" "fm,0"))
! (match_operand:DF 2 "register_operand" "0,f")]))]
"TARGET_80387
! && (GET_CODE (operands[1]) != MEM || GET_CODE (operands[2]) != MEM)"
! "* return output_387_binary_op (insn, operands);"
! [(set (attr "type")
! (cond [(match_operand:DF 3 "mult_operator" "")
! (const_string "fmul")
! (match_operand:DF 3 "div_operator" "")
! (const_string "fdiv")
! ]
! (const_string "fop")))])
!
! (define_insn "*fop_df_5"
! [(set (match_operand:DF 0 "register_operand" "=f,f")
! (match_operator:DF 3 "binary_fp_operator"
! [(match_operand:DF 1 "register_operand" "0,f")
! (float_extend:DF
! (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))]
! "TARGET_80387"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand:DF 3 "mult_operator" "")
(const_string "fmul")
! (match_operand:DF 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))])
! (define_insn "*fop_xf_1"
! [(set (match_operand:XF 0 "register_operand" "=f,f")
! (match_operator:XF 3 "binary_fp_operator"
! [(match_operand:XF 1 "register_operand" "0,f")
! (match_operand:XF 2 "register_operand" "f,0")]))]
"TARGET_80387
! && GET_RTX_CLASS (GET_CODE (operands[3])) != 'c'"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand:XF 3 "mult_operator" "")
(const_string "fmul")
! (match_operand:XF 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))])
! (define_insn "*fop_xf_2"
! [(set (match_operand:XF 0 "register_operand" "=f,f")
! (match_operator:XF 3 "binary_fp_operator"
! [(float:XF (match_operand:SI 1 "nonimmediate_operand" "m,?r"))
! (match_operand:XF 2 "register_operand" "0,0")]))]
! "TARGET_80387 && TARGET_USE_FIOP"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand:XF 3 "mult_operator" "")
(const_string "fmul")
! (match_operand:XF 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))
(set_attr "fp_int_src" "true")
(set_attr "ppro_uops" "many")])
! (define_insn "*fop_xf_3"
! [(set (match_operand:XF 0 "register_operand" "=f,f")
! (match_operator:XF 3 "binary_fp_operator"
! [(match_operand:XF 1 "register_operand" "0,0")
! (float:XF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))]
! "TARGET_80387 && TARGET_USE_FIOP"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand:XF 3 "mult_operator" "")
(const_string "fmul")
! (match_operand:XF 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))
(set_attr "fp_int_src" "true")
(set_attr "ppro_uops" "many")])
- (define_insn "*fop_xf_4"
- [(set (match_operand:XF 0 "register_operand" "=f,f")
- (match_operator:XF 3 "binary_fp_operator"
- [(float_extend:XF (match_operand:SF 1 "nonimmediate_operand" "fm,0"))
- (match_operand:XF 2 "register_operand" "0,f")]))]
- "TARGET_80387"
- "* return output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:XF 3 "mult_operator" "")
- (const_string "fmul")
- (match_operand:XF 3 "div_operator" "")
- (const_string "fdiv")
- ]
- (const_string "fop")))])
-
- (define_insn "*fop_xf_5"
- [(set (match_operand:XF 0 "register_operand" "=f,f")
- (match_operator:XF 3 "binary_fp_operator"
- [(match_operand:XF 1 "register_operand" "0,f")
- (float_extend:XF
- (match_operand:SF 2 "nonimmediate_operand" "fm,0"))]))]
- "TARGET_80387"
- "* return output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:XF 3 "mult_operator" "")
- (const_string "fmul")
- (match_operand:XF 3 "div_operator" "")
- (const_string "fdiv")
- ]
- (const_string "fop")))])
-
- (define_insn "*fop_xf_6"
- [(set (match_operand:XF 0 "register_operand" "=f,f")
- (match_operator:XF 3 "binary_fp_operator"
- [(float_extend:XF (match_operand:DF 1 "nonimmediate_operand" "fm,0"))
- (match_operand:XF 2 "register_operand" "0,f")]))]
- "TARGET_80387"
- "* return output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:XF 3 "mult_operator" "")
- (const_string "fmul")
- (match_operand:XF 3 "div_operator" "")
- (const_string "fdiv")
- ]
- (const_string "fop")))])
-
- (define_insn "*fop_xf_7"
- [(set (match_operand:XF 0 "register_operand" "=f,f")
- (match_operator:XF 3 "binary_fp_operator"
- [(match_operand:XF 1 "register_operand" "0,f")
- (float_extend:XF
- (match_operand:DF 2 "nonimmediate_operand" "fm,0"))]))]
- "TARGET_80387"
- "* return output_387_binary_op (insn, operands);"
- [(set (attr "type")
- (cond [(match_operand:XF 3 "mult_operator" "")
- (const_string "fmul")
- (match_operand:XF 3 "div_operator" "")
- (const_string "fdiv")
- ]
- (const_string "fop")))])
-
(define_split
! [(set (match_operand 0 "register_operand" "")
(match_operator 3 "binary_fp_operator"
[(float (match_operand:SI 1 "register_operand" ""))
! (match_operand 2 "register_operand" "")]))]
"TARGET_80387 && reload_completed
&& FLOAT_MODE_P (GET_MODE (operands[0]))"
[(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 1))
--- 7300,7454 ----
;; Gcc is slightly more smart about handling normal two address instructions
;; so use special patterns for add and mull.
! (define_insn "*fop_comm_1"
! [(set (match_operand 0 "i387_output_reg_operand" "=f")
! (match_operator 3 "binary_fp_operator"
! [(match_operand 1 "i387_pop_reg_operand" "%0")
! (match_operand 2 "i387_pop_memreg_operand" "fm")]))]
! "TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])
! && GET_MODE (operands[0]) == GET_MODE (operands[2])
! && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (if_then_else (match_operand 3 "mult_operator" "")
(const_string "fmul")
(const_string "fop")))])
! (define_insn "*fop_comm_2"
! [(set (match_operand 0 "i387_output_reg_operand" "=f")
! (match_operator 3 "binary_fp_operator"
! [(match_operand 1 "i387_pop_reg_operand" "%0")
! (match_operand 2 "i387_pop_reg_operand" "f")]))]
! "TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])
! && GET_MODE (operands[0]) == GET_MODE (operands[2])
! && GET_RTX_CLASS (GET_CODE (operands[3])) == 'c'"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (if_then_else (match_operand 3 "mult_operator" "")
(const_string "fmul")
(const_string "fop")))])
! (define_insn "*fop_1"
! [(set (match_operand 0 "i387_output_reg_operand" "=f,f")
! (match_operator 3 "binary_fp_operator"
! [(match_operand 1 "i387_pop_memreg_operand" "0,fm")
! (match_operand 2 "i387_pop_memreg_operand" "fm,0")]))]
"TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])
! && GET_MODE (operands[0]) == GET_MODE (operands[2])
! && (GET_CODE (i387_true_operand (operands[1])) != MEM
! || GET_CODE (i387_true_operand (operands[2])) != MEM)"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand 3 "mult_operator" "")
(const_string "fmul")
! (match_operand 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))])
! (define_insn "*fop_2"
! [(set (match_operand 0 "i387_output_reg_operand" "=f,f")
! (match_operator 3 "binary_fp_operator"
! [(match_operand 1 "i387_pop_reg_operand" "0,f")
! (match_operand 2 "i387_pop_memreg_operand" "fm,0")]))]
"TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])
! && GET_MODE (operands[0]) == GET_MODE (operands[2])"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand 3 "mult_operator" "")
(const_string "fmul")
! (match_operand 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))])
! (define_insn "*fop_3"
! [(set (match_operand 0 "i387_output_reg_operand" "=f,f")
! (match_operator 3 "binary_fp_operator"
! [(match_operand 1 "i387_pop_memreg_operand" "0,fm")
! (match_operand 2 "i387_pop_reg_operand" "f,0")]))]
"TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])
! && GET_MODE (operands[0]) == GET_MODE (operands[2])"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand 3 "mult_operator" "")
(const_string "fmul")
! (match_operand 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))])
! (define_insn "*fop_4"
! [(set (match_operand 0 "i387_output_reg_operand" "=f,f")
! (match_operator 3 "binary_fp_operator"
! [(match_operand 1 "i387_pop_reg_operand" "0,f")
! (match_operand 2 "i387_pop_reg_operand" "f,0")]))]
"TARGET_80387
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])
! && GET_MODE (operands[0]) == GET_MODE (operands[2])"
"* return output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand 3 "mult_operator" "")
(const_string "fmul")
! (match_operand 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))])
! (define_insn "*fop_int_1"
! [(set (match_operand 0 "i387_output_topreg_operand" "=f,f")
! (match_operator 3 "binary_fp_operator"
! [(float (match_operand:SI 1 "nonimmediate_operand" "m,?r"))
! (match_operand 2 "i387_topreg_operand" "0,0")]))]
! "TARGET_80387 && TARGET_USE_FIOP
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[2])"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand:SF 3 "mult_operator" "")
(const_string "fmul")
! (match_operand:SF 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))
(set_attr "fp_int_src" "true")
(set_attr "ppro_uops" "many")])
! (define_insn "*fop_int_2"
! [(set (match_operand:SF 0 "i387_output_topreg_operand" "=f,f")
! (match_operator:SF 3 "binary_fp_operator"
! [(match_operand:SF 1 "i387_topreg_operand" "0,0")
! (float:SF (match_operand:SI 2 "nonimmediate_operand" "m,?r"))]))]
! "TARGET_80387 && TARGET_USE_FIOP
! && FLOAT_MODE_P (GET_MODE (operands[0]))
! && GET_MODE (operands[0]) == GET_MODE (operands[1])"
"* return which_alternative ? \"#\" : output_387_binary_op (insn, operands);"
[(set (attr "type")
! (cond [(match_operand:SF 3 "mult_operator" "")
(const_string "fmul")
! (match_operand:SF 3 "div_operator" "")
(const_string "fdiv")
]
(const_string "fop")))
(set_attr "fp_int_src" "true")
(set_attr "ppro_uops" "many")])
(define_split
! [(set (match_operand 0 "i387_output_topreg_operand" "")
(match_operator 3 "binary_fp_operator"
[(float (match_operand:SI 1 "register_operand" ""))
! (match_operand 2 "i387_topreg_operand" "")]))]
"TARGET_80387 && reload_completed
&& FLOAT_MODE_P (GET_MODE (operands[0]))"
[(set (mem:SI (pre_dec:SI (reg:SI 7))) (match_dup 1))
***************
*** 7666,7674 ****
gen_rtx_MEM (SImode, stack_pointer_rtx));")
(define_split
! [(set (match_operand 0 "register_operand" "")
(match_operator 3 "binary_fp_operator"
! [(match_operand 1 "register_operand" "")
(float (match_operand:SI 2 "register_operand" ""))]))]
"TARGET_80387 && reload_completed
&& FLOAT_MODE_P (GET_MODE (operands[0]))"
--- 7460,7468 ----
gen_rtx_MEM (SImode, stack_pointer_rtx));")
(define_split
! [(set (match_operand 0 "i387_output_topreg_operand" "")
(match_operator 3 "binary_fp_operator"
! [(match_operand 1 "i387_topreg_operand" "")
(float (match_operand:SI 2 "register_operand" ""))]))]
"TARGET_80387 && reload_completed
&& FLOAT_MODE_P (GET_MODE (operands[0]))"
***************
*** 7683,7788 ****
;; FPU special functions.
(define_insn "sqrtsf2"
! [(set (match_operand:SF 0 "register_operand" "=f")
! (sqrt:SF (match_operand:SF 1 "register_operand" "0")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387"
"fsqrt"
[(set_attr "type" "fpspc")])
(define_insn "sqrtdf2"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (sqrt:DF (match_operand:DF 1 "register_operand" "0")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt"
[(set_attr "type" "fpspc")])
- (define_insn "*sqrtextendsfdf2"
- [(set (match_operand:DF 0 "register_operand" "=f")
- (sqrt:DF (float_extend:DF
- (match_operand:SF 1 "register_operand" "0"))))]
- "! TARGET_NO_FANCY_MATH_387 && TARGET_80387"
- "fsqrt"
- [(set_attr "type" "fpspc")])
-
(define_insn "sqrtxf2"
! [(set (match_operand:XF 0 "register_operand" "=f")
! (sqrt:XF (match_operand:XF 1 "register_operand" "0")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt"
[(set_attr "type" "fpspc")])
- (define_insn "*sqrtextenddfxf2"
- [(set (match_operand:XF 0 "register_operand" "=f")
- (sqrt:XF (float_extend:XF
- (match_operand:DF 1 "register_operand" "0"))))]
- "! TARGET_NO_FANCY_MATH_387 && TARGET_80387"
- "fsqrt"
- [(set_attr "type" "fpspc")])
-
- (define_insn "*sqrtextendsfxf2"
- [(set (match_operand:XF 0 "register_operand" "=f")
- (sqrt:XF (float_extend:XF
- (match_operand:SF 1 "register_operand" "0"))))]
- "! TARGET_NO_FANCY_MATH_387 && TARGET_80387"
- "fsqrt"
- [(set_attr "type" "fpspc")])
-
(define_insn "sindf2"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (unspec:DF [(match_operand:DF 1 "register_operand" "0")] 1))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fsin"
[(set_attr "type" "fpspc")])
(define_insn "sinsf2"
! [(set (match_operand:SF 0 "register_operand" "=f")
! (unspec:SF [(match_operand:SF 1 "register_operand" "0")] 1))]
! "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
! "fsin"
! [(set_attr "type" "fpspc")])
!
! (define_insn "*sinextendsfdf2"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (unspec:DF [(float_extend:DF
! (match_operand:SF 1 "register_operand" "0"))] 1))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fsin"
[(set_attr "type" "fpspc")])
(define_insn "sinxf2"
! [(set (match_operand:XF 0 "register_operand" "=f")
! (unspec:XF [(match_operand:XF 1 "register_operand" "0")] 1))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fsin"
[(set_attr "type" "fpspc")])
(define_insn "cosdf2"
! [(set (match_operand:DF 0 "register_operand" "=f")
! (unspec:DF [(match_operand:DF 1 "register_operand" "0")] 2))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fcos"
[(set_attr "type" "fpspc")])
(define_insn "cossf2"
! [(set (match_operand:SF 0 "register_operand" "=f")
! (unspec:SF [(match_operand:SF 1 "register_operand" "0")] 2))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fcos"
[(set_attr "type" "fpspc")])
- (define_insn "*cosextendsfdf2"
- [(set (match_operand:DF 0 "register_operand" "=f")
- (unspec:DF [(float_extend:DF
- (match_operand:SF 1 "register_operand" "0"))] 2))]
- "! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
- "fcos"
- [(set_attr "type" "fpspc")])
-
(define_insn "cosxf2"
! [(set (match_operand:XF 0 "register_operand" "=f")
! (unspec:XF [(match_operand:XF 1 "register_operand" "0")] 2))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fcos"
[(set_attr "type" "fpspc")])
--- 7477,7542 ----
;; FPU special functions.
(define_insn "sqrtsf2"
! [(set (match_operand:SF 0 "i387_output_topreg_operand" "=f")
! (sqrt:SF (match_operand:SF 1 "i387_topreg_operand" "0")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387"
"fsqrt"
[(set_attr "type" "fpspc")])
(define_insn "sqrtdf2"
! [(set (match_operand:DF 0 "i387_output_topreg_operand" "=f")
! (sqrt:DF (match_operand:DF 1 "i387_topreg_operand" "0")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt"
[(set_attr "type" "fpspc")])
(define_insn "sqrtxf2"
! [(set (match_operand:XF 0 "i387_output_topreg_operand" "=f")
! (sqrt:XF (match_operand:XF 1 "i387_topreg_operand" "0")))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387
&& (TARGET_IEEE_FP || flag_fast_math) "
"fsqrt"
[(set_attr "type" "fpspc")])
(define_insn "sindf2"
! [(set (match_operand:DF 0 "i387_output_topreg_operand" "=f")
! (unspec:DF [(match_operand:DF 1 "i387_topreg_operand" "0")] 1))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fsin"
[(set_attr "type" "fpspc")])
(define_insn "sinsf2"
! [(set (match_operand:SF 0 "i387_output_topreg_operand" "=f")
! (unspec:SF [(match_operand:SF 1 "i387_topreg_operand" "0")] 1))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fsin"
[(set_attr "type" "fpspc")])
(define_insn "sinxf2"
! [(set (match_operand:XF 0 "i387_output_topreg_operand" "=f")
! (unspec:XF [(match_operand:XF 1 "i387_topreg_operand" "0")] 1))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fsin"
[(set_attr "type" "fpspc")])
(define_insn "cosdf2"
! [(set (match_operand:DF 0 "i387_output_topreg_operand" "=f")
! (unspec:DF [(match_operand:DF 1 "i387_topreg_operand" "0")] 2))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fcos"
[(set_attr "type" "fpspc")])
(define_insn "cossf2"
! [(set (match_operand:SF 0 "i387_output_topreg_operand" "=f")
! (unspec:SF [(match_operand:SF 1 "i387_topreg_operand" "0")] 2))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fcos"
[(set_attr "type" "fpspc")])
(define_insn "cosxf2"
! [(set (match_operand:XF 0 "i387_output_topreg_operand" "=f")
! (unspec:XF [(match_operand:XF 1 "i387_topreg_operand" "0")] 2))]
"! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && flag_fast_math"
"fcos"
[(set_attr "type" "fpspc")])
***************
*** 8194,8212 ****
[(set_attr "type" "icmov")])
(define_expand "movsfcc"
! [(set (match_operand:SF 0 "register_operand" "")
(if_then_else:SF (match_operand 1 "comparison_operator" "")
! (match_operand:SF 2 "register_operand" "")
! (match_operand:SF 3 "register_operand" "")))]
"TARGET_CMOVE"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_insn "*movsfcc_1"
! [(set (match_operand:SF 0 "register_operand" "=f,f")
(if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
[(reg 17) (const_int 0)])
! (match_operand:SF 2 "register_operand" "f,0")
! (match_operand:SF 3 "register_operand" "0,f")))]
"TARGET_CMOVE"
"@
fcmov%F1\\t{%2, %0|%0, %2}
--- 7948,7966 ----
[(set_attr "type" "icmov")])
(define_expand "movsfcc"
! [(set (match_operand:SF 0 "i387_output_reg_operand" "")
(if_then_else:SF (match_operand 1 "comparison_operator" "")
! (match_operand:SF 2 "i387_reg_operand" "")
! (match_operand:SF 3 "i387_reg_operand" "")))]
"TARGET_CMOVE"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_insn "*movsfcc_1"
! [(set (match_operand:SF 0 "i387_output_reg_operand" "=f,f")
(if_then_else:SF (match_operator 1 "fcmov_comparison_operator"
[(reg 17) (const_int 0)])
! (match_operand:SF 2 "i387_reg_operand" "f,0")
! (match_operand:SF 3 "i387_reg_operand" "0,f")))]
"TARGET_CMOVE"
"@
fcmov%F1\\t{%2, %0|%0, %2}
***************
*** 8214,8232 ****
[(set_attr "type" "fcmov")])
(define_expand "movdfcc"
! [(set (match_operand:DF 0 "register_operand" "")
(if_then_else:DF (match_operand 1 "comparison_operator" "")
! (match_operand:DF 2 "register_operand" "")
! (match_operand:DF 3 "register_operand" "")))]
"TARGET_CMOVE"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_insn "*movdfcc_1"
! [(set (match_operand:DF 0 "register_operand" "=f,f")
(if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
[(reg 17) (const_int 0)])
! (match_operand:DF 2 "register_operand" "f,0")
! (match_operand:DF 3 "register_operand" "0,f")))]
"TARGET_CMOVE"
"@
fcmov%F1\\t{%2, %0|%0, %2}
--- 7968,7986 ----
[(set_attr "type" "fcmov")])
(define_expand "movdfcc"
! [(set (match_operand:DF 0 "i387_output_reg_operand" "")
(if_then_else:DF (match_operand 1 "comparison_operator" "")
! (match_operand:DF 2 "i387_reg_operand" "")
! (match_operand:DF 3 "i387_reg_operand" "")))]
"TARGET_CMOVE"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_insn "*movdfcc_1"
! [(set (match_operand:DF 0 "i387_output_reg_operand" "=f,f")
(if_then_else:DF (match_operator 1 "fcmov_comparison_operator"
[(reg 17) (const_int 0)])
! (match_operand:DF 2 "i387_reg_operand" "f,0")
! (match_operand:DF 3 "i387_reg_operand" "0,f")))]
"TARGET_CMOVE"
"@
fcmov%F1\\t{%2, %0|%0, %2}
***************
*** 8234,8252 ****
[(set_attr "type" "fcmov")])
(define_expand "movxfcc"
! [(set (match_operand:XF 0 "register_operand" "")
(if_then_else:XF (match_operand 1 "comparison_operator" "")
! (match_operand:XF 2 "register_operand" "")
! (match_operand:XF 3 "register_operand" "")))]
"TARGET_CMOVE"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_insn "*movxfcc_1"
! [(set (match_operand:XF 0 "register_operand" "=f,f")
(if_then_else:XF (match_operator 1 "fcmov_comparison_operator"
[(reg 17) (const_int 0)])
! (match_operand:XF 2 "register_operand" "f,0")
! (match_operand:XF 3 "register_operand" "0,f")))]
"TARGET_CMOVE"
"@
fcmov%F1\\t{%2, %0|%0, %2}
--- 7988,8006 ----
[(set_attr "type" "fcmov")])
(define_expand "movxfcc"
! [(set (match_operand:XF 0 "i387_output_reg_operand" "")
(if_then_else:XF (match_operand 1 "comparison_operator" "")
! (match_operand:XF 2 "i387_reg_operand" "")
! (match_operand:XF 3 "i387_reg_operand" "")))]
"TARGET_CMOVE"
"if (! ix86_expand_fp_movcc (operands)) FAIL; DONE;")
(define_insn "*movxfcc_1"
! [(set (match_operand:XF 0 "i387_output_reg_operand" "=f,f")
(if_then_else:XF (match_operator 1 "fcmov_comparison_operator"
[(reg 17) (const_int 0)])
! (match_operand:XF 2 "i387_reg_operand" "f,0")
! (match_operand:XF 3 "i387_reg_operand" "0,f")))]
"TARGET_CMOVE"
"@
fcmov%F1\\t{%2, %0|%0, %2}