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Re: regclass change causing Sparc problems


Hi
Does this patch fix your problems? (I can test it on x86 backend, since
regclass don't do anything usefull there.)

If so could you please approve it?

Fri Dec 17 13:56:33 MET 1999  Jan Hubicka  <hubicka@freesoft.cz>
	* regclass.c (regclass): Do not use flowgraph when not optimizing.

*** regclass.c.old	Fri Dec 17 13:53:01 1999
--- regclass.c	Fri Dec 17 13:55:29 1999
*************** regclass (f, nregs, dump)
*** 1070,1099 ****
        bzero (in_inc_dec, nregs);
  #endif
  
-       loop_cost = 1;
- 
        /* Scan the instructions and record each time it would
  	 save code to put a certain register in a certain class.  */
  
!       for (index = 0; index < n_basic_blocks; index++)
  	{
! 	  basic_block bb = BASIC_BLOCK (index);
! 
! 	  /* Show that an insn inside a loop is likely to be executed three
! 	     times more than insns outside a loop.  This is much more aggressive
! 	     than the assumptions made elsewhere and is being tried as an
! 	     experiment.  */
! 	  if (optimize_size)
! 	    loop_cost = 1;
! 	  else
! 	    loop_cost = 1 << (2 * MIN (bb->loop_depth - 1, 5));
! 	  for (insn = bb->head; ; insn = NEXT_INSN (insn))
! 	    {
! 	      insn = scan_one_insn (insn, pass);
! 	      if (insn == bb->end)
! 		break;
! 	    }
  	}
        
        /* Now for each register look at how desirable each class is
  	 and find which class is preferred.  Store that in
--- 1070,1104 ----
        bzero (in_inc_dec, nregs);
  #endif
  
        /* Scan the instructions and record each time it would
  	 save code to put a certain register in a certain class.  */
  
!       if (!optimize)
  	{
! 	  loop_cost =1;
! 	  for (insn = f; insn; insn = NEXT_INSN (insn))
! 	    insn = scan_one_insn (insn, pass);
  	}
+       else
+ 	for (index = 0; index < n_basic_blocks; index++)	
+ 	  {
+ 	    basic_block bb = BASIC_BLOCK (index);
+ 
+ 	    /* Show that an insn inside a loop is likely to be executed three
+ 	       times more than insns outside a loop.  This is much more aggressive
+ 	       than the assumptions made elsewhere and is being tried as an
+ 	       experiment.  */
+ 	    if (optimize_size)
+ 	      loop_cost = 1;
+ 	    else
+ 	      loop_cost = 1 << (2 * MIN (bb->loop_depth - 1, 5));
+ 	    for (insn = bb->head; ; insn = NEXT_INSN (insn))
+ 	      {
+ 		insn = scan_one_insn (insn, pass);
+ 		if (insn == bb->end)
+ 		  break;
+ 	      }
+ 	  }
        
        /* Now for each register look at how desirable each class is
  	 and find which class is preferred.  Store that in


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