This is the mail archive of the
gcc-patches@gcc.gnu.org
mailing list for the GCC project.
Re: hard register reload patch
- To: Joern Rennecke <amylaar at cygnus dot co dot uk>
- Subject: Re: hard register reload patch
- From: Jeffrey A Law <law at cygnus dot com>
- Date: Thu, 09 Dec 1999 00:17:19 -0700
- cc: bernds at cygnus dot co dot uk (Bernd Schmidt), gcc-patches at gcc dot gnu dot org
- Reply-To: law at cygnus dot com
In message <199912021604.QAA10019@phal.cygnus.co.uk>you write:
>
> On the other hand, there are cases when such transformations are desired.
> There are a number of ways how we could distinguish these cases:
>
> - The hard register is in a single-register register class, and is a
> non-fixed register.
This sounds like the best of the three alternative.s
> - We could have a target macro to say which register classes should be
> exempt from combining into instructions that have multiple inputs/outputs
Poor design. I bet we'll find that the first alternative you mentioned will
cover the cases we actually care about and it can be coded without having to
tweak backends.
> - We could check if there is an operand constraint that requires the
> particular hard register in question.
Ugh. I'd really prefer not to see constraints keep bleeding into more passes
of the compiler. We should be relying more and more on predicates and less and
less on constraints for most actions before register allocation gets started.
jeff